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authorbellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162>2007-11-08 14:25:03 +0000
committerbellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162>2007-11-08 14:25:03 +0000
commitec6338bac30f982c16c23106edcf1ce4a04da575 (patch)
treeeb42654dd53839e7d6b74d4d7c071be0ff533ae5 /target-i386/cpu.h
parent838104f60845adfa3ff5ad30e7f3a28c76f42bea (diff)
removed obsolete x86 code copy support
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3551 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-i386/cpu.h')
-rw-r--r--target-i386/cpu.h11
1 files changed, 0 insertions, 11 deletions
diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index e92fc31048..c8fb125916 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -46,10 +46,6 @@
#include "softfloat.h"
-#if defined(__i386__) && !defined(CONFIG_SOFTMMU) && !defined(__APPLE__)
-#define USE_CODE_COPY
-#endif
-
#define R_EAX 0
#define R_ECX 1
#define R_EDX 2
@@ -552,13 +548,6 @@ typedef struct CPUX86State {
uint64_t pat;
- /* temporary data for USE_CODE_COPY mode */
-#ifdef USE_CODE_COPY
- uint32_t tmp0;
- uint32_t saved_esp;
- int native_fp_regs; /* if true, the FPU state is in the native CPU regs */
-#endif
-
/* exception/interrupt handling */
jmp_buf jmp_env;
int exception_index;