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authorbellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162>2007-11-11 22:16:56 +0000
committerbellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162>2007-11-11 22:16:56 +0000
commit6f12a2a6ea8fc04e4f98f493de4046cc185fd00a (patch)
treef72e064c5e8a5f7d7bb2c28d56af92cb28ee70d3 /target-i386/cpu.h
parent0d1e239407c73a90a32c8e2f5e1fe4e9cc10ca1f (diff)
consistent types for cpu_x86_fsave and cpu_x86_frstor
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3621 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-i386/cpu.h')
-rw-r--r--target-i386/cpu.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index a6ad54be3a..910a4b48ce 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -670,8 +670,8 @@ CPU86_LDouble cpu_set_fp80(uint64_t mant, uint16_t upper);
/* the following helpers are only usable in user mode simulation as
they can trigger unexpected exceptions */
void cpu_x86_load_seg(CPUX86State *s, int seg_reg, int selector);
-void cpu_x86_fsave(CPUX86State *s, uint8_t *ptr, int data32);
-void cpu_x86_frstor(CPUX86State *s, uint8_t *ptr, int data32);
+void cpu_x86_fsave(CPUX86State *s, target_ulong ptr, int data32);
+void cpu_x86_frstor(CPUX86State *s, target_ulong ptr, int data32);
/* you can call this signal handler from your SIGBUS and SIGSEGV
signal handlers to inform the virtual CPU of exceptions. non zero