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authorbellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162>2008-05-28 17:14:10 +0000
committerbellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162>2008-05-28 17:14:10 +0000
commitce5232c5c281552039466be5eadf93a712eb7611 (patch)
tree4f39afe8e12ef9743d4bb9ba11f80c4358b76bf4 /target-i386/cpu.h
parentd377440d7401bec1b61d12f2103df378eea995e1 (diff)
moved halted field to CPU_COMMON
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4609 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-i386/cpu.h')
-rw-r--r--target-i386/cpu.h4
1 files changed, 1 insertions, 3 deletions
diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index a2b7ba54b4..2012debef7 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -119,7 +119,7 @@
#define ID_MASK 0x00200000
/* hidden flags - used internally by qemu to represent additional cpu
- states. Only the CPL, INHIBIT_IRQ and HALTED are not redundant. We avoid
+ states. Only the CPL and INHIBIT_IRQ are not redundant. We avoid
using the IOPL_MASK, TF_MASK and VM_MASK bit position to ease oring
with eflags. */
/* current cpl */
@@ -144,7 +144,6 @@
#define HF_CS64_SHIFT 15 /* only used on x86_64: 64 bit code segment */
#define HF_OSFXSR_SHIFT 16 /* CR4.OSFXSR */
#define HF_VM_SHIFT 17 /* must be same as eflags */
-#define HF_HALTED_SHIFT 18 /* CPU halted */
#define HF_SMM_SHIFT 19 /* CPU in SMM mode */
#define HF_GIF_SHIFT 20 /* if set CPU takes interrupts */
#define HF_HIF_SHIFT 21 /* shadow copy of IF_MASK when in SVM */
@@ -166,7 +165,6 @@
#define HF_LMA_MASK (1 << HF_LMA_SHIFT)
#define HF_CS64_MASK (1 << HF_CS64_SHIFT)
#define HF_OSFXSR_MASK (1 << HF_OSFXSR_SHIFT)
-#define HF_HALTED_MASK (1 << HF_HALTED_SHIFT)
#define HF_SMM_MASK (1 << HF_SMM_SHIFT)
#define HF_GIF_MASK (1 << HF_GIF_SHIFT)
#define HF_HIF_MASK (1 << HF_HIF_SHIFT)