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authorAnthony Liguori <aliguori@amazon.com>2014-01-24 15:52:44 -0800
committerAnthony Liguori <aliguori@amazon.com>2014-01-24 15:52:44 -0800
commit0169c511554cb0014a00290b0d3d26c31a49818f (patch)
tree14a38b1ffe2fde4125b57198698c5ba791feea58 /target-i386/cpu.c
parent1c51e68b182bb335464bb19ad2517fd43c58c127 (diff)
parent439d19f2922ac409ee224bc1e5522cee7009d829 (diff)
Merge remote-tracking branch 'qemu-kvm/uq/master' into staging
* qemu-kvm/uq/master: kvm: always update the MPX model specific register KVM: fix addr type for KVM_IOEVENTFD KVM: Retry KVM_CREATE_VM on EINTR mempath prefault: fix off-by-one error kvm: x86: Separately write feature control MSR on reset roms: Flush icache when writing roms to guest memory target-i386: clear guest TSC on reset target-i386: do not special case TSC writeback target-i386: Intel MPX Conflicts: exec.c aliguori: fix trivial merge conflict in exec.c Signed-off-by: Anthony Liguori <aliguori@amazon.com>
Diffstat (limited to 'target-i386/cpu.c')
-rw-r--r--target-i386/cpu.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 0eea8c7160..e6f7eaf5cd 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -336,6 +336,10 @@ typedef struct ExtSaveArea {
static const ExtSaveArea ext_save_areas[] = {
[2] = { .feature = FEAT_1_ECX, .bits = CPUID_EXT_AVX,
.offset = 0x240, .size = 0x100 },
+ [3] = { .feature = FEAT_7_0_EBX, .bits = CPUID_7_0_EBX_MPX,
+ .offset = 0x3c0, .size = 0x40 },
+ [4] = { .feature = FEAT_7_0_EBX, .bits = CPUID_7_0_EBX_MPX,
+ .offset = 0x400, .size = 0x10 },
};
const char *get_register_name_32(unsigned int reg)
@@ -2461,6 +2465,9 @@ static void x86_cpu_reset(CPUState *s)
cpu_breakpoint_remove_all(env, BP_CPU);
cpu_watchpoint_remove_all(env, BP_CPU);
+ env->tsc_adjust = 0;
+ env->tsc = 0;
+
#if !defined(CONFIG_USER_ONLY)
/* We hard-wire the BSP to the first CPU. */
if (s->cpu_index == 0) {