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authorLuwei Kang <luwei.kang@intel.com>2016-08-02 16:10:39 +0800
committerEduardo Habkost <ehabkost@redhat.com>2016-09-05 16:01:55 -0300
commitcc728d1493eee3e20c1547191862e43d3f55e714 (patch)
tree2d07490e48b73a202fa1279eb57138e560e28ad1 /target-i386/cpu.c
parent630eb0faf4d3c04a117a047247691e0654632aa8 (diff)
target-i386: Add more Intel AVX-512 instructions support
Add more AVX512 feature bits, include AVX512DQ, AVX512IFMA, AVX512BW, AVX512VL, AVX512VBMI. Its spec can be found at: https://software.intel.com/sites/default/files/managed/b4/3a/319433-024.pdf Signed-off-by: Luwei Kang <luwei.kang@intel.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Diffstat (limited to 'target-i386/cpu.c')
-rw-r--r--target-i386/cpu.c14
1 files changed, 9 insertions, 5 deletions
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 6a1afab595..ec674dcb73 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -298,14 +298,18 @@ static const char *svm_feature_name[] = {
};
static const char *cpuid_7_0_ebx_feature_name[] = {
- "fsgsbase", "tsc_adjust", NULL, "bmi1", "hle", "avx2", NULL, "smep",
- "bmi2", "erms", "invpcid", "rtm", NULL, NULL, "mpx", NULL,
- "avx512f", NULL, "rdseed", "adx", "smap", NULL, "pcommit", "clflushopt",
- "clwb", NULL, "avx512pf", "avx512er", "avx512cd", NULL, NULL, NULL,
+ "fsgsbase", "tsc_adjust", NULL, "bmi1",
+ "hle", "avx2", NULL, "smep",
+ "bmi2", "erms", "invpcid", "rtm",
+ NULL, NULL, "mpx", NULL,
+ "avx512f", "avx512dq", "rdseed", "adx",
+ "smap", "avx512ifma", "pcommit", "clflushopt",
+ "clwb", NULL, "avx512pf", "avx512er",
+ "avx512cd", NULL, "avx512bw", "avx512vl",
};
static const char *cpuid_7_0_ecx_feature_name[] = {
- NULL, NULL, "umip", "pku",
+ NULL, "avx512vbmi", "umip", "pku",
"ospke", NULL, NULL, NULL,
NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL,