diff options
author | Anthony Liguori <aliguori@us.ibm.com> | 2013-07-10 10:54:16 -0500 |
---|---|---|
committer | Anthony Liguori <aliguori@us.ibm.com> | 2013-07-10 10:54:16 -0500 |
commit | 51455c59ddc370612f6e070d8eb0e594aaa7ef24 (patch) | |
tree | a3044bd466cb3a548e6abad273663469bf68647a /target-i386/arch_dump.c | |
parent | 9f9a03b9818194da39c6759d9b0cbee5d7ace4e1 (diff) | |
parent | 91b1df8cf9e1ecaa8679c9ea8713d1e25c28e6c4 (diff) |
Merge remote-tracking branch 'afaerber/tags/qom-cpu-for-anthony' into staging
QOM CPUState refactorings
* Fix for OpenRISCCPU subclasses
* Fix for gdbstub CPU selection
* Move linux-user CPU functions into new header
* CPUState part 10 refactoring: first_cpu, next_cpu, cpu_single_env et al.
* Fix some targets to consistently inline TCG code generation
* Centrally log CPU reset
# gpg: Signature made Wed 10 Jul 2013 07:52:39 AM CDT using RSA key ID 3E7E013F
# gpg: Can't check signature: public key not found
# By Andreas Färber (41) and others
# Via Andreas Färber
* afaerber/tags/qom-cpu-for-anthony: (43 commits)
cpu: Move reset logging to CPUState
target-ppc: Change LOG_MMU_STATE() argument to CPUState
target-i386: Change LOG_PCALL_STATE() argument to CPUState
log: Change log_cpu_state[_mask]() argument to CPUState
target-i386: Change do_smm_enter() argument to X86CPU
target-i386: Change do_interrupt_all() argument to X86CPU
target-xtensa: Change gen_intermediate_code_internal() arg to XtensaCPU
target-unicore32: Change gen_intermediate_code_internal() signature
target-sparc: Change gen_intermediate_code_internal() argument to SPARCCPU
target-sh4: Change gen_intermediate_code_internal() argument to SuperHCPU
target-s390x: Change gen_intermediate_code_internal() argument to S390CPU
target-ppc: Change gen_intermediate_code_internal() argument to PowerPCCPU
target-mips: Change gen_intermediate_code_internal() argument to MIPSCPU
target-microblaze: Change gen_intermediate_code_internal() argument types
target-m68k: Change gen_intermediate_code_internal() argument to M68kCPU
target-lm32: Change gen_intermediate_code_internal() argument to LM32CPU
target-i386: Change gen_intermediate_code_internal() argument to X86CPU
target-cris: Change gen_intermediate_code_internal() argument to CRISCPU
target-arm: Change gen_intermediate_code_internal() argument to ARMCPU
target-alpha: Change gen_intermediate_code_internal() argument to AlphaCPU
...
Diffstat (limited to 'target-i386/arch_dump.c')
-rw-r--r-- | target-i386/arch_dump.c | 17 |
1 files changed, 10 insertions, 7 deletions
diff --git a/target-i386/arch_dump.c b/target-i386/arch_dump.c index 83898cd00f..10dc2284bf 100644 --- a/target-i386/arch_dump.c +++ b/target-i386/arch_dump.c @@ -35,7 +35,7 @@ typedef struct { } x86_64_elf_prstatus; static int x86_64_write_elf64_note(WriteCoreDumpFunction f, - CPUArchState *env, int id, + CPUX86State *env, int id, void *opaque) { x86_64_user_regs_struct regs; @@ -119,7 +119,7 @@ typedef struct { char pad3[4]; } x86_elf_prstatus; -static void x86_fill_elf_prstatus(x86_elf_prstatus *prstatus, CPUArchState *env, +static void x86_fill_elf_prstatus(x86_elf_prstatus *prstatus, CPUX86State *env, int id) { memset(prstatus, 0, sizeof(x86_elf_prstatus)); @@ -144,7 +144,7 @@ static void x86_fill_elf_prstatus(x86_elf_prstatus *prstatus, CPUArchState *env, prstatus->pid = id; } -static int x86_write_elf64_note(WriteCoreDumpFunction f, CPUArchState *env, +static int x86_write_elf64_note(WriteCoreDumpFunction f, CPUX86State *env, int id, void *opaque) { x86_elf_prstatus prstatus; @@ -185,7 +185,8 @@ int x86_cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cs, X86CPU *cpu = X86_CPU(cs); int ret; #ifdef TARGET_X86_64 - bool lma = !!(first_cpu->hflags & HF_LMA_MASK); + X86CPU *first_x86_cpu = X86_CPU(first_cpu); + bool lma = !!(first_x86_cpu->env.hflags & HF_LMA_MASK); if (lma) { ret = x86_64_write_elf64_note(f, &cpu->env, cpuid, opaque); @@ -273,7 +274,7 @@ static void copy_segment(QEMUCPUSegment *d, SegmentCache *s) d->base = s->base; } -static void qemu_get_cpustate(QEMUCPUState *s, CPUArchState *env) +static void qemu_get_cpustate(QEMUCPUState *s, CPUX86State *env) { memset(s, 0, sizeof(QEMUCPUState)); @@ -320,7 +321,7 @@ static void qemu_get_cpustate(QEMUCPUState *s, CPUArchState *env) } static inline int cpu_write_qemu_note(WriteCoreDumpFunction f, - CPUArchState *env, + CPUX86State *env, void *opaque, int type) { @@ -394,7 +395,9 @@ int cpu_get_dump_info(ArchDumpInfo *info) RAMBlock *block; #ifdef TARGET_X86_64 - lma = !!(first_cpu->hflags & HF_LMA_MASK); + X86CPU *first_x86_cpu = X86_CPU(first_cpu); + + lma = !!(first_x86_cpu->env.hflags & HF_LMA_MASK); #endif if (lma) { |