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authorbellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162>2008-05-15 16:46:30 +0000
committerbellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162>2008-05-15 16:46:30 +0000
commitb8b6a50b552e1ddb9f0c563cbfb6f67aa0330b64 (patch)
tree70f78f7d7a4577ca95b9b05aff61b5b2f479aa6f /target-i386/TODO
parent6e01bdaedc3fc42c88672fafe960d3371dabb63e (diff)
converted more helpers to TCG - fixed some SVM issues
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4459 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-i386/TODO')
-rw-r--r--target-i386/TODO13
1 files changed, 11 insertions, 2 deletions
diff --git a/target-i386/TODO b/target-i386/TODO
index 1bca8ba88e..53be196415 100644
--- a/target-i386/TODO
+++ b/target-i386/TODO
@@ -3,12 +3,13 @@ Correctness issues:
- rework eflags optimization (will be a consequence of TCG port)
- SVM: rework the implementation: simplify code, move most intercept
tests as dynamic, correct segment access, verify exception safety,
- remove most of the added CPU state.
+ cpu save/restore, SMM save/restore.
- arpl eflags computation is invalid
- x86_64: fxsave/fxrestore intel/amd differences
- x86_64: lcall/ljmp intel/amd differences ?
- x86_64: cmpxchgl intel/amd differences ?
-- x86_64: cmovl bug intel/amd differences ?
+- x86_64: cmovl intel/amd differences ?
+- cmpxchg16b + cmpxchg8b cpuid test
- x86: monitor invalid
- better code fetch (different exception handling + CS.limit support)
- user/kernel PUSHL/POPL in helper.c
@@ -19,10 +20,18 @@ Correctness issues:
- full support of segment limit/rights
- full x87 exception support
- improve x87 bit exactness (use bochs code ?)
+- DRx register support
+- CR0.AC emulation
+- SSE alignment checks
+- fix SSE min/max with nans
Optimizations/Features:
- finish TCG port
+- add SVM nested paging support
+- add VMX support
+- add AVX support
+- add SSE5 support
- evaluate x87 stack pointer statically
- find a way to avoid translating several time the same TB if CR0.TS
is set or not.