diff options
| author | Richard Henderson <rth@twiddle.net> | 2015-08-29 12:37:33 -0700 |
|---|---|---|
| committer | Richard Henderson <rth@twiddle.net> | 2015-10-07 20:36:26 +1100 |
| commit | 765b842adec4c5a359e69ca08785553599f71496 (patch) | |
| tree | cb87b4e8a3ad9f88148a4d743dee3d62483544ce /target-cris | |
| parent | 5fdb4671b08e0d1631447e81348b2b50a6b85bf7 (diff) | |
tcg: Rename debug_insn_start to insn_start
With an eye toward making it mandatory.
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target-cris')
| -rw-r--r-- | target-cris/translate.c | 4 | ||||
| -rw-r--r-- | target-cris/translate_v10.c | 2 |
2 files changed, 3 insertions, 3 deletions
diff --git a/target-cris/translate.c b/target-cris/translate.c index d5b54e1ad4..c5a22afa66 100644 --- a/target-cris/translate.c +++ b/target-cris/translate.c @@ -2995,8 +2995,8 @@ static unsigned int crisv32_decoder(CPUCRISState *env, DisasContext *dc) int i; if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP | CPU_LOG_TB_OP_OPT))) { - tcg_gen_debug_insn_start(dc->pc); - } + tcg_gen_insn_start(dc->pc); + } /* Load a halfword onto the instruction register. */ dc->ir = cris_fetch(env, dc, dc->pc, 2, 0); diff --git a/target-cris/translate_v10.c b/target-cris/translate_v10.c index da0b2caf85..12d7dfc45e 100644 --- a/target-cris/translate_v10.c +++ b/target-cris/translate_v10.c @@ -1200,7 +1200,7 @@ static unsigned int crisv10_decoder(CPUCRISState *env, DisasContext *dc) unsigned int insn_len = 2; if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP))) - tcg_gen_debug_insn_start(dc->pc); + tcg_gen_insn_start(dc->pc); /* Load a halfword onto the instruction register. */ dc->ir = cpu_lduw_code(env, dc->pc); |