diff options
| author | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2015-08-17 17:34:10 +1000 |
|---|---|---|
| committer | Richard Henderson <rth@twiddle.net> | 2015-09-11 08:15:28 -0700 |
| commit | 97ed5ccdee95f0b98bedc601ff979e368583472c (patch) | |
| tree | 5ee711528010f3700f13983b8222c2ca7ae85c83 /target-cris/translate_v10.c | |
| parent | ba9cef7b6e487a5a8969db81d09b8eec8a2b50c6 (diff) | |
tlb: Add "ifetch" argument to cpu_mmu_index()
This is set to true when the index is for an instruction fetch
translation.
The core get_page_addr_code() sets it, as do the SOFTMMU_CODE_ACCESS
acessors.
All targets ignore it for now, and all other callers pass "false".
This will allow targets who wish to split the mmu index between
instruction and data accesses to do so. A subsequent patch will
do just that for PowerPC.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Message-Id: <1439796853-4410-2-git-send-email-benh@kernel.crashing.org>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target-cris/translate_v10.c')
| -rw-r--r-- | target-cris/translate_v10.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target-cris/translate_v10.c b/target-cris/translate_v10.c index 618c234949..da0b2caf85 100644 --- a/target-cris/translate_v10.c +++ b/target-cris/translate_v10.c @@ -96,7 +96,7 @@ static void gen_store_v10_conditional(DisasContext *dc, TCGv addr, TCGv val, static void gen_store_v10(DisasContext *dc, TCGv addr, TCGv val, unsigned int size) { - int mem_index = cpu_mmu_index(&dc->cpu->env); + int mem_index = cpu_mmu_index(&dc->cpu->env, false); /* If we get a fault on a delayslot we must keep the jmp state in the cpu-state to be able to re-execute the jmp. */ |