diff options
| author | pbrook <pbrook@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-05-11 14:35:37 +0000 |
|---|---|---|
| committer | pbrook <pbrook@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-05-11 14:35:37 +0000 |
| commit | 390efc54fb87e91ac9aeb47a7bc23806452b30cb (patch) | |
| tree | 41e310b3e5a4a571bbb40a6995d2085a1ef26987 /target-cris/translate.c | |
| parent | 44cd42ee4082813cc4b45117bbb6156920957e47 (diff) | |
Add TCG native negation op.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4426 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-cris/translate.c')
| -rw-r--r-- | target-cris/translate.c | 16 |
1 files changed, 7 insertions, 9 deletions
diff --git a/target-cris/translate.c b/target-cris/translate.c index 89a0533857..9551ea1f3d 100644 --- a/target-cris/translate.c +++ b/target-cris/translate.c @@ -318,7 +318,7 @@ static void t_gen_lz_i32(TCGv d, TCGv x) /* y = -(x >> 16) */ tcg_gen_shri_i32(y, x, 16); - tcg_gen_sub_i32(y, tcg_const_i32(0), y); + tcg_gen_neg_i32(y, y); /* m = (y >> 16) & 16 */ tcg_gen_sari_i32(m, y, 16); @@ -753,9 +753,9 @@ static void crisv32_alu_op(DisasContext *dc, int op, int rd, int size) t_gen_add_flag(cpu_T[0], 8); /* R_FLAG. */ break; case CC_OP_SUB: - tcg_gen_sub_tl(cpu_T[1], tcg_const_tl(0), cpu_T[1]); + tcg_gen_neg_tl(cpu_T[1], cpu_T[1]); tcg_gen_add_tl(cpu_T[0], cpu_T[0], cpu_T[1]); - tcg_gen_sub_tl(cpu_T[1], tcg_const_tl(0), cpu_T[1]); + tcg_gen_neg_tl(cpu_T[1], cpu_T[1]); /* CRIS flag evaluation needs ~src. */ tcg_gen_xori_tl(cpu_T[1], cpu_T[1], -1); @@ -784,9 +784,7 @@ static void crisv32_alu_op(DisasContext *dc, int op, int rd, int size) t_gen_asr(cpu_T[0], cpu_T[0], cpu_T[1]); break; case CC_OP_NEG: - /* Hopefully the TCG backend recognizes this pattern - and makes a real neg out of it. */ - tcg_gen_sub_tl(cpu_T[0], tcg_const_tl(0), cpu_T[1]); + tcg_gen_neg_tl(cpu_T[0], cpu_T[1]); /* Extended arithmetics. */ t_gen_subx_carry(cpu_T[0]); break; @@ -829,10 +827,10 @@ static void crisv32_alu_op(DisasContext *dc, int op, int rd, int size) } break; case CC_OP_CMP: - tcg_gen_sub_tl(cpu_T[1], tcg_const_tl(0), cpu_T[1]); + tcg_gen_neg_tl(cpu_T[1], cpu_T[1]); tcg_gen_add_tl(cpu_T[0], cpu_T[0], cpu_T[1]); /* CRIS flag evaluation needs ~src. */ - tcg_gen_sub_tl(cpu_T[1], tcg_const_tl(0), cpu_T[1]); + tcg_gen_neg_tl(cpu_T[1], cpu_T[1]); /* CRIS flag evaluation needs ~src. */ tcg_gen_xori_tl(cpu_T[1], cpu_T[1], -1); @@ -1642,7 +1640,7 @@ static unsigned int dec_abs_r(DisasContext *dc) /* TODO: consider a branch free approach. */ l1 = gen_new_label(); tcg_gen_brcond_tl(TCG_COND_GE, cpu_T[1], tcg_const_tl(0), l1); - tcg_gen_sub_tl(cpu_T[1], tcg_const_tl(0), cpu_T[1]); + tcg_gen_neg_tl(cpu_T[1], cpu_T[1]); gen_set_label(l1); crisv32_alu_op(dc, CC_OP_MOVE, dc->op2, 4); return 2; |