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authoredgar_igl <edgar_igl@c046a42c-6fe2-441c-8c8c-71466251a162>2008-05-17 19:11:14 +0000
committeredgar_igl <edgar_igl@c046a42c-6fe2-441c-8c8c-71466251a162>2008-05-17 19:11:14 +0000
commitd1896336032ff066fdb73f1164e4e9814a67700a (patch)
tree3118482ed17cd27de4d0746051b3bd22d1451c06 /target-cris/translate.c
parentbbf662ee31cbd2dcd4fa7f469ad7e16f78e1acfa (diff)
Use tcg_gen_not.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4480 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-cris/translate.c')
-rw-r--r--target-cris/translate.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/target-cris/translate.c b/target-cris/translate.c
index a71991a544..691904be8e 100644
--- a/target-cris/translate.c
+++ b/target-cris/translate.c
@@ -347,7 +347,7 @@ static void t_gen_lz_i32(TCGv d, TCGv x)
tcg_gen_shri_i32(y, x, 14);
/* m = y & ~(y >> 1) */
tcg_gen_sari_i32(m, y, 1);
- tcg_gen_xori_i32(m, m, 0xffffffff);
+ tcg_gen_not_i32(m, m);
tcg_gen_and_i32(m, m, y);
/* d = n + 2 - m */
@@ -754,7 +754,7 @@ static void crisv32_alu_op(DisasContext *dc, int op, int rd, int size)
tcg_gen_add_tl(cpu_T[0], cpu_T[0], cpu_T[1]);
tcg_gen_neg_tl(cpu_T[1], cpu_T[1]);
/* CRIS flag evaluation needs ~src. */
- tcg_gen_xori_tl(cpu_T[1], cpu_T[1], -1);
+ tcg_gen_not_tl(cpu_T[1], cpu_T[1]);
/* Extended arithmetics. */
t_gen_subx_carry(dc, cpu_T[0]);
@@ -826,7 +826,7 @@ static void crisv32_alu_op(DisasContext *dc, int op, int rd, int size)
case CC_OP_CMP:
tcg_gen_sub_tl(cpu_T[0], cpu_T[0], cpu_T[1]);
/* CRIS flag evaluation needs ~src. */
- tcg_gen_xori_tl(cpu_T[1], cpu_T[1], ~0);
+ tcg_gen_not_tl(cpu_T[1], cpu_T[1]);
/* Extended arithmetics. */
t_gen_subx_carry(dc, cpu_T[0]);
@@ -1686,7 +1686,7 @@ static unsigned int dec_swap_r(DisasContext *dc)
cris_cc_mask(dc, CC_MASK_NZ);
t_gen_mov_TN_reg(cpu_T[0], dc->op1);
if (dc->op2 & 8)
- tcg_gen_xori_tl(cpu_T[0], cpu_T[0], -1);
+ tcg_gen_not_tl(cpu_T[0], cpu_T[0]);
if (dc->op2 & 4)
t_gen_swapw(cpu_T[0], cpu_T[0]);
if (dc->op2 & 2)