diff options
author | edgar_igl <edgar_igl@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-03-01 17:25:33 +0000 |
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committer | edgar_igl <edgar_igl@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-03-01 17:25:33 +0000 |
commit | bbaf29c76994ef762523bc8893a88cac701c87e7 (patch) | |
tree | 5d39be7749d8f177f79402bca5da5bc2388e27f8 /target-cris/helper.c | |
parent | bffd92fed9393021200915586be8d1b0cc711286 (diff) |
* target-cris/op.c: Make sure the bit-test insn only updates the XNZ flags.
* target-cris/helper.c: Update ERP for user-mode simulation aswell.
* hw/etraxfs_timer.c: Support multiple timers.
* hw/etraxfs_ser.c: Multiple ports, the data just goes to stdout.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4004 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-cris/helper.c')
-rw-r--r-- | target-cris/helper.c | 18 |
1 files changed, 8 insertions, 10 deletions
diff --git a/target-cris/helper.c b/target-cris/helper.c index e7eac08e68..7482e0893f 100644 --- a/target-cris/helper.c +++ b/target-cris/helper.c @@ -32,22 +32,23 @@ void do_interrupt (CPUState *env) { - env->exception_index = -1; + env->exception_index = -1; + env->pregs[PR_ERP] = env->pc; } int cpu_cris_handle_mmu_fault(CPUState * env, target_ulong address, int rw, int mmu_idx, int is_softmmu) { - env->exception_index = 0xaa; - env->debug1 = address; - cpu_dump_state(env, stderr, fprintf, 0); - printf("%s addr=%x env->pc=%x\n", __func__, address, env->pc); - return 1; + env->exception_index = 0xaa; + env->debug1 = address; + cpu_dump_state(env, stderr, fprintf, 0); + env->pregs[PR_ERP] = env->pc; + return 1; } target_phys_addr_t cpu_get_phys_page_debug(CPUState * env, target_ulong addr) { - return addr; + return addr; } #else /* !CONFIG_USER_ONLY */ @@ -61,7 +62,6 @@ int cpu_cris_handle_mmu_fault (CPUState *env, target_ulong address, int rw, address &= TARGET_PAGE_MASK; prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC; -// printf ("%s pc=%x %x w=%d smmu=%d\n", __func__, env->pc, address, rw, is_softmmu); miss = cris_mmu_translate(&res, env, address, rw, mmu_idx); if (miss) { @@ -73,7 +73,6 @@ int cpu_cris_handle_mmu_fault (CPUState *env, target_ulong address, int rw, { phy = res.phy; } -// printf ("a=%x phy=%x\n", address, phy); return tlb_set_page(env, address, phy, prot, mmu_idx, is_softmmu); } @@ -113,7 +112,6 @@ void do_interrupt(CPUState *env) break; case EXCP_MMU_MISS: -// printf ("MMU miss\n"); irqnum = 4; ebp = env->pregs[PR_EBP]; isr = ldl_code(ebp + irqnum * 4); |