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authorSergey Fedorov <serge.fdrv@gmail.com>2015-11-17 16:38:46 +0300
committerPeter Maydell <peter.maydell@linaro.org>2015-11-19 12:11:42 +0000
commit43bfa4a100687af8d293fef0a197839b51400fca (patch)
tree53dba11176f83a20363c6abfc840b31ce1d6bbb3 /target-arm
parenta859595791e6ac5c14afe0b8a53634bf1cc21f0f (diff)
target-arm: Update condexec before CP access check in AA32 translation
Coprocessor access instructions are allowed inside IT block. gen_helper_access_check_cp_reg() can raise an exceptions thus condexec bits should be updated before. Signed-off-by: Sergey Fedorov <serge.fdrv@gmail.com> Message-id: 1447767527-21268-2-git-send-email-serge.fdrv@gmail.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target-arm')
-rw-r--r--target-arm/translate.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/target-arm/translate.c b/target-arm/translate.c
index 43518541e1..739f373fc2 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -7210,6 +7210,7 @@ static int disas_coproc_insn(DisasContext *s, uint32_t insn)
break;
}
+ gen_set_condexec(s);
gen_set_pc_im(s, s->pc - 4);
tmpptr = tcg_const_ptr(ri);
tcg_syn = tcg_const_i32(syndrome);