diff options
| author | Peter Maydell <peter.maydell@linaro.org> | 2014-04-15 19:18:45 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2014-04-17 21:34:05 +0100 |
| commit | 2eef0bf82146034f756d39cb02c8c8dd561a8942 (patch) | |
| tree | 8ddb101e6d3baae323a1926f9a961092c0799695 /target-arm | |
| parent | 014406b510faae91b801c8c6fd408a7609f6de0b (diff) | |
target-arm: Implement AArch64 view of ACTLR
Implement the AArch64 view of the ACTLR (auxiliary control
register). Note that QEMU internally tends to call this
AUXCR for historical reasons.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Diffstat (limited to 'target-arm')
| -rw-r--r-- | target-arm/helper.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/target-arm/helper.c b/target-arm/helper.c index 10300aa331..32af1df530 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -2316,7 +2316,8 @@ void register_cp_regs_for_features(ARMCPU *cpu) if (arm_feature(env, ARM_FEATURE_AUXCR)) { ARMCPRegInfo auxcr = { - .name = "AUXCR", .cp = 15, .crn = 1, .crm = 0, .opc1 = 0, .opc2 = 1, + .name = "ACTLR_EL1", .state = ARM_CP_STATE_BOTH, + .opc0 = 3, .opc1 = 0, .crn = 1, .crm = 0, .opc2 = 1, .access = PL1_RW, .type = ARM_CP_CONST, .resetvalue = cpu->reset_auxcr }; |