diff options
author | Peter Maydell <peter.maydell@linaro.org> | 2014-09-12 14:06:49 +0100 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2014-09-12 14:06:49 +0100 |
commit | 16a906fd6ebbe894d8545ba6168cabea5ef49b1d (patch) | |
tree | b026c539670bcfab95f571e7d037c9731f9a254b /target-arm | |
parent | 3ff6fc9148d0a9e683eb6ec78523a017247e990d (diff) |
target-arm: Set DBGDSCR.MOE for debug exceptions taken to AArch32
For debug exceptions taken to AArch32 we have to set the
DBGDSCR.MOE (Method Of Entry) bits; we can identify the
kind of debug exception from the information in
exception.syndrome.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target-arm')
-rw-r--r-- | target-arm/helper.c | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/target-arm/helper.c b/target-arm/helper.c index b0d2424df3..30d8e60e20 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -3629,11 +3629,37 @@ void arm_cpu_do_interrupt(CPUState *cs) uint32_t mask; int new_mode; uint32_t offset; + uint32_t moe; assert(!IS_M(env)); arm_log_exception(cs->exception_index); + /* If this is a debug exception we must update the DBGDSCR.MOE bits */ + switch (env->exception.syndrome >> ARM_EL_EC_SHIFT) { + case EC_BREAKPOINT: + case EC_BREAKPOINT_SAME_EL: + moe = 1; + break; + case EC_WATCHPOINT: + case EC_WATCHPOINT_SAME_EL: + moe = 10; + break; + case EC_AA32_BKPT: + moe = 3; + break; + case EC_VECTORCATCH: + moe = 5; + break; + default: + moe = 0; + break; + } + + if (moe) { + env->cp15.mdscr_el1 = deposit64(env->cp15.mdscr_el1, 2, 4, moe); + } + /* TODO: Vectored interrupt controller. */ switch (cs->exception_index) { case EXCP_UDEF: |