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| author | Peter Maydell <peter.maydell@linaro.org> | 2016-09-06 20:03:58 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2016-09-06 20:03:58 +0100 |
| commit | 7faae0b36e51ffdb17d4716ddc40dcfa682d93d9 (patch) | |
| tree | f08788b23327d24c3c1a400fc919e2d74e5c0dc8 /target-arm | |
| parent | 2926375cffce464fde6b4dabaed1e133d549af39 (diff) | |
| parent | c827c06a4dd6c768eeb3aaa6af6cfd29663116af (diff) | |
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20160906-1' into staging
target-arm queue:
* fix incorrect LPAE bit in FSR for alignment faults
* ACPI: fix the AML ID format for CPU devices to work for
large numbers of CPUs
* ast2400: add memory controller device model
* m25p80: fix the vmstate structure name (migration break)
# gpg: Signature made Tue 06 Sep 2016 20:02:28 BST
# gpg: using RSA key 0x3C2525ED14360CDE
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>"
# gpg: aka "Peter Maydell <pmaydell@gmail.com>"
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>"
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* remotes/pmaydell/tags/pull-target-arm-20160906-1:
block: m25p80: Fix vmstate structure name
ARM: ACPI: fix the AML ID format for CPU devices
target-arm: Fix lpae bit in FSR on an alignment fault
ast2400: add a memory controller device model
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target-arm')
| -rw-r--r-- | target-arm/op_helper.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target-arm/op_helper.c b/target-arm/op_helper.c index 3e8588ee6a..be27b21d52 100644 --- a/target-arm/op_helper.c +++ b/target-arm/op_helper.c @@ -194,7 +194,7 @@ void arm_cpu_do_unaligned_access(CPUState *cs, vaddr vaddr, * the LPAE long descriptor format, or the short descriptor format */ if (arm_s1_regime_using_lpae_format(env, cpu_mmu_index(env, false))) { - env->exception.fsr = 0x21; + env->exception.fsr = (1 << 9) | 0x21; } else { env->exception.fsr = 0x1; } |