diff options
author | bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> | 2005-02-07 12:42:35 +0000 |
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committer | bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> | 2005-02-07 12:42:35 +0000 |
commit | 7ff4d2180b27b3356379ca66738da10ad8b2f73a (patch) | |
tree | cc195f7f5f33f8671f360076f9cf86a634a84156 /target-arm | |
parent | e88de09993cf37702c1f20f5299471aa123295e6 (diff) |
CF generator for constant operands
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1267 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-arm')
-rw-r--r-- | target-arm/op.c | 5 | ||||
-rw-r--r-- | target-arm/translate.c | 3 |
2 files changed, 7 insertions, 1 deletions
diff --git a/target-arm/op.c b/target-arm/op.c index 813c285b56..561883457d 100644 --- a/target-arm/op.c +++ b/target-arm/op.c @@ -105,6 +105,11 @@ void OPPROTO op_movl_T1_im(void) T1 = PARAM1; } +void OPPROTO op_mov_CF_T1(void) +{ + env->CF = ((uint32_t)T1) >> 31; +} + void OPPROTO op_movl_T2_im(void) { T2 = PARAM1; diff --git a/target-arm/translate.c b/target-arm/translate.c index e2c5b8fc09..7223242136 100644 --- a/target-arm/translate.c +++ b/target-arm/translate.c @@ -536,7 +536,8 @@ static void disas_arm_insn(DisasContext *s) if (shift) val = (val >> shift) | (val << (32 - shift)); gen_op_movl_T1_im(val); - /* XXX: is CF modified ? */ + if (logic_cc && shift) + gen_op_mov_CF_T1(); } else { /* register */ rm = (insn) & 0xf; |