diff options
author | Sergey Sorokin <afarallax@yandex.ru> | 2016-06-14 15:26:17 +0300 |
---|---|---|
committer | Peter Maydell <peter.maydell@linaro.org> | 2016-07-12 13:06:08 +0100 |
commit | b35399bb4e9968296a12303b00f9f2066470e987 (patch) | |
tree | b73e72aff843aa5b6cfa9f4eaa87a4aece723a6c /target-arm | |
parent | 74e1b782b34e280b06a90f61fdbac5a046cbe491 (diff) |
Fix confusing argument names in some common functions
There are functions tlb_fill(), cpu_unaligned_access() and
do_unaligned_access() that are called with access type and mmu index
arguments. But these arguments are named 'is_write' and 'is_user' in their
declarations. The patches fix the arguments to avoid a confusion.
Signed-off-by: Sergey Sorokin <afarallax@yandex.ru>
Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
Message-id: 1465907177-1399402-1-git-send-email-afarallax@yandex.ru
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target-arm')
-rw-r--r-- | target-arm/internals.h | 5 | ||||
-rw-r--r-- | target-arm/op_helper.c | 30 |
2 files changed, 20 insertions, 15 deletions
diff --git a/target-arm/internals.h b/target-arm/internals.h index 466be0bdad..cd574017c6 100644 --- a/target-arm/internals.h +++ b/target-arm/internals.h @@ -476,8 +476,9 @@ bool arm_tlb_fill(CPUState *cpu, vaddr address, int rw, int mmu_idx, bool arm_s1_regime_using_lpae_format(CPUARMState *env, ARMMMUIdx mmu_idx); /* Raise a data fault alignment exception for the specified virtual address */ -void arm_cpu_do_unaligned_access(CPUState *cs, vaddr vaddr, int is_write, - int is_user, uintptr_t retaddr); +void arm_cpu_do_unaligned_access(CPUState *cs, vaddr vaddr, + MMUAccessType access_type, + int mmu_idx, uintptr_t retaddr); /* Call the EL change hook if one has been registered */ static inline void arm_call_el_change_hook(ARMCPU *cpu) diff --git a/target-arm/op_helper.c b/target-arm/op_helper.c index 73da759206..3e8588ee6a 100644 --- a/target-arm/op_helper.c +++ b/target-arm/op_helper.c @@ -79,7 +79,7 @@ uint32_t HELPER(neon_tbl)(CPUARMState *env, uint32_t ireg, uint32_t def, static inline uint32_t merge_syn_data_abort(uint32_t template_syn, unsigned int target_el, bool same_el, - bool s1ptw, int is_write, + bool s1ptw, bool is_write, int fsc) { uint32_t syn; @@ -97,7 +97,7 @@ static inline uint32_t merge_syn_data_abort(uint32_t template_syn, */ if (!(template_syn & ARM_EL_ISV) || target_el != 2 || s1ptw) { syn = syn_data_abort_no_iss(same_el, - 0, 0, s1ptw, is_write == 1, fsc); + 0, 0, s1ptw, is_write, fsc); } else { /* Fields: IL, ISV, SAS, SSE, SRT, SF and AR come from the template * syndrome created at translation time. @@ -105,7 +105,7 @@ static inline uint32_t merge_syn_data_abort(uint32_t template_syn, */ syn = syn_data_abort_with_iss(same_el, 0, 0, 0, 0, 0, - 0, 0, s1ptw, is_write == 1, fsc, + 0, 0, s1ptw, is_write, fsc, false); /* Merge the runtime syndrome with the template syndrome. */ syn |= template_syn; @@ -117,14 +117,14 @@ static inline uint32_t merge_syn_data_abort(uint32_t template_syn, * NULL, it means that the function was called in C code (i.e. not * from generated code or from helper.c) */ -void tlb_fill(CPUState *cs, target_ulong addr, int is_write, int mmu_idx, - uintptr_t retaddr) +void tlb_fill(CPUState *cs, target_ulong addr, MMUAccessType access_type, + int mmu_idx, uintptr_t retaddr) { bool ret; uint32_t fsr = 0; ARMMMUFaultInfo fi = {}; - ret = arm_tlb_fill(cs, addr, is_write, mmu_idx, &fsr, &fi); + ret = arm_tlb_fill(cs, addr, access_type, mmu_idx, &fsr, &fi); if (unlikely(ret)) { ARMCPU *cpu = ARM_CPU(cs); CPUARMState *env = &cpu->env; @@ -149,13 +149,15 @@ void tlb_fill(CPUState *cs, target_ulong addr, int is_write, int mmu_idx, /* For insn and data aborts we assume there is no instruction syndrome * information; this is always true for exceptions reported to EL1. */ - if (is_write == 2) { + if (access_type == MMU_INST_FETCH) { syn = syn_insn_abort(same_el, 0, fi.s1ptw, syn); exc = EXCP_PREFETCH_ABORT; } else { syn = merge_syn_data_abort(env->exception.syndrome, target_el, - same_el, fi.s1ptw, is_write, syn); - if (is_write == 1 && arm_feature(env, ARM_FEATURE_V6)) { + same_el, fi.s1ptw, + access_type == MMU_DATA_STORE, syn); + if (access_type == MMU_DATA_STORE + && arm_feature(env, ARM_FEATURE_V6)) { fsr |= (1 << 11); } exc = EXCP_DATA_ABORT; @@ -168,8 +170,9 @@ void tlb_fill(CPUState *cs, target_ulong addr, int is_write, int mmu_idx, } /* Raise a data fault alignment exception for the specified virtual address */ -void arm_cpu_do_unaligned_access(CPUState *cs, vaddr vaddr, int is_write, - int is_user, uintptr_t retaddr) +void arm_cpu_do_unaligned_access(CPUState *cs, vaddr vaddr, + MMUAccessType access_type, + int mmu_idx, uintptr_t retaddr) { ARMCPU *cpu = ARM_CPU(cs); CPUARMState *env = &cpu->env; @@ -196,12 +199,13 @@ void arm_cpu_do_unaligned_access(CPUState *cs, vaddr vaddr, int is_write, env->exception.fsr = 0x1; } - if (is_write == 1 && arm_feature(env, ARM_FEATURE_V6)) { + if (access_type == MMU_DATA_STORE && arm_feature(env, ARM_FEATURE_V6)) { env->exception.fsr |= (1 << 11); } syn = merge_syn_data_abort(env->exception.syndrome, target_el, - same_el, 0, is_write, 0x21); + same_el, 0, access_type == MMU_DATA_STORE, + 0x21); raise_exception(env, EXCP_DATA_ABORT, syn, target_el); } |