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authorChristophe Lyon <christophe.lyon@st.com>2011-02-08 18:39:02 +0100
committerAurelien Jarno <aurelien@aurel32.net>2011-02-09 19:48:48 +0100
commit923e65097d2101a78f716f7932f4291315d88bbf (patch)
treedb329b4fcdd62680011fedcfa26e55af6d9a551d /target-arm
parentacdf01effa1851780a731ca5ffeab79a474a6335 (diff)
target-arm: implement vsli.64, vsri.64
Signed-off-by: Christophe Lyon <christophe.lyon@st.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'target-arm')
-rw-r--r--target-arm/translate.c14
1 files changed, 13 insertions, 1 deletions
diff --git a/target-arm/translate.c b/target-arm/translate.c
index ef3f36919d..3087a5dcdd 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -4698,7 +4698,19 @@ static int disas_neon_data_insn(CPUState * env, DisasContext *s, uint32_t insn)
tcg_gen_add_i64(cpu_V0, cpu_V0, cpu_V1);
} else if (op == 4 || (op == 5 && u)) {
/* Insert */
- cpu_abort(env, "VS[LR]I.64 not implemented");
+ neon_load_reg64(cpu_V1, rd + pass);
+ uint64_t mask;
+ if (shift < -63 || shift > 63) {
+ mask = 0;
+ } else {
+ if (op == 4) {
+ mask = 0xffffffffffffffffull >> -shift;
+ } else {
+ mask = 0xffffffffffffffffull << shift;
+ }
+ }
+ tcg_gen_andi_i64(cpu_V1, cpu_V1, ~mask);
+ tcg_gen_or_i64(cpu_V0, cpu_V0, cpu_V1);
}
neon_store_reg64(cpu_V0, rd + pass);
} else { /* size < 3 */