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authorPeter Maydell <peter.maydell@linaro.org>2015-01-09 16:29:36 +0000
committerPeter Maydell <peter.maydell@linaro.org>2015-01-09 16:29:36 +0000
commita4ba200894e851f4df9be67eb2d091333a17f499 (patch)
treee0cec60370cf5898b00d1ee13e62d3a919c880a9 /target-arm
parent7d010ae9e0079ea17d56cd961953d8832052c5fd (diff)
parent5aa8136020f47fbd38c458b9834c783cb7063db8 (diff)
Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging
More migration fixes and more record/replay preparations. Also moves the sdhci-pci device id to make space for the rocker device. # gpg: Signature made Sat 03 Jan 2015 08:22:36 GMT using RSA key ID 78C7AE83 # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" # gpg: WARNING: This key is not certified with sufficiently trusted signatures! # gpg: It is not certain that the signature belongs to the owner. # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * remotes/bonzini/tags/for-upstream: pci: move REDHAT_SDHCI device ID to make room for Rocker block/iscsi: fix uninitialized variable pckbd: set bits 2-3-6-7 of the output port by default serial: refine serial_thr_ipending_needed gen-icount: check cflags instead of use_icount global translate: check cflags instead of use_icount global cpu-exec: add a new CF_USE_ICOUNT cflag target-ppc: pass DisasContext to SPR generator functions atomic: fix position of volatile qualifier Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target-arm')
-rw-r--r--target-arm/translate-a64.c6
-rw-r--r--target-arm/translate.c6
2 files changed, 6 insertions, 6 deletions
diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c
index 80d2c07e82..80d23597c7 100644
--- a/target-arm/translate-a64.c
+++ b/target-arm/translate-a64.c
@@ -1372,7 +1372,7 @@ static void handle_sys(DisasContext *s, uint32_t insn, bool isread,
break;
}
- if (use_icount && (ri->type & ARM_CP_IO)) {
+ if ((s->tb->cflags & CF_USE_ICOUNT) && (ri->type & ARM_CP_IO)) {
gen_io_start();
}
@@ -1403,7 +1403,7 @@ static void handle_sys(DisasContext *s, uint32_t insn, bool isread,
}
}
- if (use_icount && (ri->type & ARM_CP_IO)) {
+ if ((s->tb->cflags & CF_USE_ICOUNT) && (ri->type & ARM_CP_IO)) {
/* I/O operations must end the TB here (whether read or write) */
gen_io_end();
s->is_jmp = DISAS_UPDATE;
@@ -10962,7 +10962,7 @@ void gen_intermediate_code_internal_a64(ARMCPU *cpu,
max_insns = CF_COUNT_MASK;
}
- gen_tb_start();
+ gen_tb_start(tb);
tcg_clear_temp_count();
diff --git a/target-arm/translate.c b/target-arm/translate.c
index b52c758698..bdfcdf169c 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -7170,7 +7170,7 @@ static int disas_coproc_insn(DisasContext *s, uint32_t insn)
break;
}
- if (use_icount && (ri->type & ARM_CP_IO)) {
+ if ((s->tb->cflags & CF_USE_ICOUNT) && (ri->type & ARM_CP_IO)) {
gen_io_start();
}
@@ -7261,7 +7261,7 @@ static int disas_coproc_insn(DisasContext *s, uint32_t insn)
}
}
- if (use_icount && (ri->type & ARM_CP_IO)) {
+ if ((s->tb->cflags & CF_USE_ICOUNT) && (ri->type & ARM_CP_IO)) {
/* I/O operations must end the TB here (whether read or write) */
gen_io_end();
gen_lookup_tb(s);
@@ -11080,7 +11080,7 @@ static inline void gen_intermediate_code_internal(ARMCPU *cpu,
if (max_insns == 0)
max_insns = CF_COUNT_MASK;
- gen_tb_start();
+ gen_tb_start(tb);
tcg_clear_temp_count();