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authorEdgar E. Iglesias <edgar.iglesias@xilinx.com>2014-05-27 17:09:50 +0100
committerPeter Maydell <peter.maydell@linaro.org>2014-05-27 17:09:50 +0100
commit9d4c4e872e7598ecbe25437dc4f663b248b2c8a5 (patch)
treea675c4b44bea0593d77f786425e9579f3c30acc8 /target-arm
parentf0aff25570003fc618c47dec36852fc7d80436ee (diff)
target-arm: Move get_mem_index to translate.h
So that it can be shared with the AArch32 code. Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 1400980132-25949-2-git-send-email-edgar.iglesias@gmail.com Message-id: 1400805738-11889-5-git-send-email-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target-arm')
-rw-r--r--target-arm/translate-a64.c9
-rw-r--r--target-arm/translate.h9
2 files changed, 9 insertions, 9 deletions
diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c
index b62db4d566..bfd139afe5 100644
--- a/target-arm/translate-a64.c
+++ b/target-arm/translate-a64.c
@@ -162,15 +162,6 @@ void aarch64_cpu_dump_state(CPUState *cs, FILE *f,
}
}
-static int get_mem_index(DisasContext *s)
-{
-#ifdef CONFIG_USER_ONLY
- return 1;
-#else
- return s->user;
-#endif
-}
-
void gen_a64_set_pc_im(uint64_t val)
{
tcg_gen_movi_i64(cpu_pc, val);
diff --git a/target-arm/translate.h b/target-arm/translate.h
index 34328f4660..8737af00e8 100644
--- a/target-arm/translate.h
+++ b/target-arm/translate.h
@@ -52,6 +52,15 @@ static inline int arm_dc_feature(DisasContext *dc, int feature)
return (dc->features & (1ULL << feature)) != 0;
}
+static inline int get_mem_index(DisasContext *s)
+{
+#ifdef CONFIG_USER_ONLY
+ return 1;
+#else
+ return s->user;
+#endif
+}
+
/* target-specific extra values for is_jmp */
/* These instructions trap after executing, so the A32/T32 decoder must
* defer them until after the conditional execution state has been updated.