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authorMatt Craighead <mjcraighead@gmail.com>2012-05-10 12:56:08 +0000
committerPeter Maydell <peter.maydell@linaro.org>2012-05-10 12:56:08 +0000
commit7e598de023e4f3f612be7f16acea2ec5dac010ec (patch)
tree934b6a0d90555ba3d36ea3f2b2b05044431fa399 /target-arm
parent9f34841a812dc622f8de98bc6141925c22f0ee93 (diff)
target-arm: When setting FPSCR.QC, don't clear other FPSCR bits
This patch fixes a bug affecting a variety of Neon instructions, such as VQADD. Signed-off-by: Matt Craighead <mjcraighead@gmail.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target-arm')
-rw-r--r--target-arm/neon_helper.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/target-arm/neon_helper.c b/target-arm/neon_helper.c
index 1e02d61bdc..e0b9dbf67e 100644
--- a/target-arm/neon_helper.c
+++ b/target-arm/neon_helper.c
@@ -16,7 +16,7 @@
#define SIGNBIT (uint32_t)0x80000000
#define SIGNBIT64 ((uint64_t)1 << 63)
-#define SET_QC() env->vfp.xregs[ARM_VFP_FPSCR] = CPSR_Q
+#define SET_QC() env->vfp.xregs[ARM_VFP_FPSCR] |= CPSR_Q
#define NEON_TYPE1(name, type) \
typedef struct \