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authorEdgar E. Iglesias <edgar.iglesias@xilinx.com>2014-05-27 17:09:54 +0100
committerPeter Maydell <peter.maydell@linaro.org>2014-05-27 17:09:54 +0100
commit14c521d45eb08b2a829b0fa90c682a7f0664ee85 (patch)
treef67657399dcae5842b8dcd40ea56005419c3bd6b /target-arm
parent7ab6c10d008c79d92b0b62e36fb0edc4066d37d6 (diff)
target-arm: A64: Trap ERET from EL0 at translation time
Suggested-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 1400980132-25949-19-git-send-email-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target-arm')
-rw-r--r--target-arm/translate-a64.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c
index bfd139afe5..ec6a39d1d6 100644
--- a/target-arm/translate-a64.c
+++ b/target-arm/translate-a64.c
@@ -1507,6 +1507,10 @@ static void disas_uncond_b_reg(DisasContext *s, uint32_t insn)
tcg_gen_movi_i64(cpu_reg(s, 30), s->pc);
break;
case 4: /* ERET */
+ if (s->current_pl == 0) {
+ unallocated_encoding(s);
+ return;
+ }
gen_helper_exception_return(cpu_env);
s->is_jmp = DISAS_JUMP;
return;