aboutsummaryrefslogtreecommitdiff
path: root/target-arm
diff options
context:
space:
mode:
authoraliguori <aliguori@c046a42c-6fe2-441c-8c8c-71466251a162>2009-04-24 18:03:20 +0000
committeraliguori <aliguori@c046a42c-6fe2-441c-8c8c-71466251a162>2009-04-24 18:03:20 +0000
commit6a4955a813467089549f865600284e6be0d018fc (patch)
treec5fdcc2861b662217e47f9271b6bf15103e2b793 /target-arm
parente5d355d12ed417fbde1c707121ec8fb4070d7667 (diff)
qemu: per-arch cpu_has_work (Marcelo Tosatti)
Blue Swirl: fix Sparc32 breakage Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7238 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-arm')
-rw-r--r--target-arm/exec.h9
1 files changed, 7 insertions, 2 deletions
diff --git a/target-arm/exec.h b/target-arm/exec.h
index 3e4083a61b..710a2f9882 100644
--- a/target-arm/exec.h
+++ b/target-arm/exec.h
@@ -37,14 +37,19 @@ static inline void regs_to_env(void)
{
}
+static inline int cpu_has_work(CPUState *env)
+{
+ return (env->interrupt_request &
+ (CPU_INTERRUPT_FIQ | CPU_INTERRUPT_HARD | CPU_INTERRUPT_EXITTB));
+}
+
static inline int cpu_halted(CPUState *env) {
if (!env->halted)
return 0;
/* An interrupt wakes the CPU even if the I and F CPSR bits are
set. We use EXITTB to silently wake CPU without causing an
actual interrupt. */
- if (env->interrupt_request &
- (CPU_INTERRUPT_FIQ | CPU_INTERRUPT_HARD | CPU_INTERRUPT_EXITTB)) {
+ if (cpu_has_work(env)) {
env->halted = 0;
return 0;
}