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authorPeter Maydell <peter.maydell@linaro.org>2015-01-20 15:19:32 +0000
committerPeter Maydell <peter.maydell@linaro.org>2015-01-20 15:19:32 +0000
commitec53b45bcd1f74f7a4c31331fa6d50b402cd6d26 (patch)
treee043c2ae73846077804b25ca3738621b6436df3d /target-arm
parent83ecb22ba2c91a4674ae109595a8ed1da8de4d7a (diff)
exec.c: Drop TARGET_HAS_ICE define and checks
The TARGET_HAS_ICE #define is intended to indicate whether a target-* guest CPU implementation supports the breakpoint handling. However, all our guest CPUs have that support (the only two which do not define TARGET_HAS_ICE are unicore32 and openrisc, and in both those cases the bp support is present and the lack of the #define is just a bug). So remove the #define entirely: all new guest CPU support should include breakpoint handling as part of the basic implementation. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Message-id: 1420484960-32365-1-git-send-email-peter.maydell@linaro.org
Diffstat (limited to 'target-arm')
-rw-r--r--target-arm/cpu.h2
1 files changed, 0 insertions, 2 deletions
diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index 7ba55f0c2e..cd7a9e8e14 100644
--- a/target-arm/cpu.h
+++ b/target-arm/cpu.h
@@ -39,8 +39,6 @@
#include "fpu/softfloat.h"
-#define TARGET_HAS_ICE 1
-
#define EXCP_UDEF 1 /* undefined instruction */
#define EXCP_SWI 2 /* software interrupt */
#define EXCP_PREFETCH_ABORT 3