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authorbalrog <balrog@c046a42c-6fe2-441c-8c8c-71466251a162>2007-06-10 13:53:18 +0000
committerbalrog <balrog@c046a42c-6fe2-441c-8c8c-71466251a162>2007-06-10 13:53:18 +0000
commit7a774c875b9995d9b40201f09a78efc73ad4c818 (patch)
tree500f1344d4fa08bbbc59e87dac8bf91cdf89e22e /target-arm
parentc9bac22c7d2405d5d243717f4a6b2e85a99e62fe (diff)
Use the same offset for all STR and STM instructions that store r15, as specified in ARM ARM (patch from Chris McNett).
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2970 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-arm')
-rw-r--r--target-arm/translate.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/target-arm/translate.c b/target-arm/translate.c
index 364f4eadba..246839d1f3 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -2837,8 +2837,8 @@ static void disas_arm_insn(CPUState * env, DisasContext *s)
} else {
/* store */
if (i == 15) {
- /* special case: r15 = PC + 12 */
- val = (long)s->pc + 8;
+ /* special case: r15 = PC + 8 */
+ val = (long)s->pc + 4;
gen_op_movl_TN_im[0](val);
} else if (user) {
gen_op_movl_T0_user(i);