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author | balrog <balrog@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-04-13 01:53:27 +0000 |
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committer | balrog <balrog@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-04-13 01:53:27 +0000 |
commit | 72f1c62f7dc24546abafe873d0aeaa2a545c0033 (patch) | |
tree | 01c7e25dd6d3501cce9560b98e3e1be2764a7f78 /target-arm/translate.c | |
parent | 6c95676b16dcabd69ad9a57c0a9ec4878d3d0e3d (diff) |
Fix ARM and Thumb ldlex/stlex.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4202 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-arm/translate.c')
-rw-r--r-- | target-arm/translate.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/target-arm/translate.c b/target-arm/translate.c index f1695decdf..3d5142a7cc 100644 --- a/target-arm/translate.c +++ b/target-arm/translate.c @@ -6241,6 +6241,7 @@ static void disas_arm_insn(CPUState * env, DisasContext *s) if (insn & (1 << 23)) { /* load/store exclusive */ gen_movl_T1_reg(s, rn); + addr = cpu_T[1]; if (insn & (1 << 20)) { gen_helper_mark_exclusive(cpu_env, cpu_T[1]); tmp = gen_ld32(addr, IS_USER(s)); @@ -6991,6 +6992,7 @@ static int disas_thumb2_insn(CPUState *env, DisasContext *s, uint16_t insn_hw1) } else if ((insn & (1 << 23)) == 0) { /* Load/store exclusive word. */ gen_movl_T1_reg(s, rn); + addr = cpu_T[1]; if (insn & (1 << 20)) { gen_helper_mark_exclusive(cpu_env, cpu_T[1]); tmp = gen_ld32(addr, IS_USER(s)); |