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authorPeter Maydell <peter.maydell@linaro.org>2014-03-10 14:56:30 +0000
committerPeter Maydell <peter.maydell@linaro.org>2014-03-10 14:56:30 +0000
commit72c1d3af6e9c2745edfeaa71918a68bcee4b79db (patch)
treed7d01966c8d75f5427fc2a9bce5994b17fe79253 /target-arm/translate.c
parent2b194951c592ad670ddf3bc5764216408ade46f8 (diff)
target-arm: Implement WFE as a yield operation
Implement WFE to yield our timeslice to the next CPU. This avoids slowdowns in multicore configurations caused by one core busy-waiting on a spinlock which can't possibly be unlocked until the other core has an opportunity to run. This speeds up my test case A15 dual-core boot by a factor of three (though it is still four or five times slower than a single-core boot). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1393339545-22111-1-git-send-email-peter.maydell@linaro.org Reviewed-by: Richard Henderson <rth@twiddle.net> Tested-by: Rob Herring <rob.herring@linaro.org>
Diffstat (limited to 'target-arm/translate.c')
-rw-r--r--target-arm/translate.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/target-arm/translate.c b/target-arm/translate.c
index 253d2a13eb..df259debcc 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -3939,6 +3939,9 @@ static void gen_nop_hint(DisasContext *s, int val)
s->is_jmp = DISAS_WFI;
break;
case 2: /* wfe */
+ gen_set_pc_im(s, s->pc);
+ s->is_jmp = DISAS_WFE;
+ break;
case 4: /* sev */
case 5: /* sevl */
/* TODO: Implement SEV, SEVL and WFE. May help SMP performance. */
@@ -10857,6 +10860,9 @@ static inline void gen_intermediate_code_internal(ARMCPU *cpu,
case DISAS_WFI:
gen_helper_wfi(cpu_env);
break;
+ case DISAS_WFE:
+ gen_helper_wfe(cpu_env);
+ break;
case DISAS_SWI:
gen_exception(EXCP_SWI);
break;