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author | bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> | 2005-02-07 23:10:07 +0000 |
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committer | bellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162> | 2005-02-07 23:10:07 +0000 |
commit | b8a9e8f1336492798107a8704c22c4e8053c3dd7 (patch) | |
tree | b1f675a1121e9c679a62d4f7d9c2e65baddea220 /target-arm/translate.c | |
parent | 4955a2cd1600344081e0b618d96c3b29942f76ef (diff) |
initial user mmu support
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1270 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-arm/translate.c')
-rw-r--r-- | target-arm/translate.c | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/target-arm/translate.c b/target-arm/translate.c index 7223242136..2eb325e8e6 100644 --- a/target-arm/translate.c +++ b/target-arm/translate.c @@ -424,6 +424,7 @@ static void disas_arm_insn(DisasContext *s) gen_op_movl_T0_psr(); gen_movl_reg_T0(s, rd); } + break; case 0x1: if (op1 == 1) { /* branch/exchange thumb (bx). */ @@ -1576,3 +1577,23 @@ target_ulong cpu_get_phys_page_debug(CPUState *env, target_ulong addr) { return addr; } + +#if defined(CONFIG_USER_ONLY) + +int cpu_arm_handle_mmu_fault (CPUState *env, target_ulong address, int rw, + int is_user, int is_softmmu) +{ + env->cp15_6 = address; + if (rw == 2) { + env->exception_index = EXCP_PREFETCH_ABORT; + } else { + env->exception_index = EXCP_DATA_ABORT; + } + return 1; +} + +#else + +#error not implemented + +#endif |