diff options
| author | Peter Maydell <peter.maydell@linaro.org> | 2016-02-18 14:16:17 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2016-02-18 14:16:17 +0000 |
| commit | f01377f591fe15c652f947646c4a69a7d4a71ad9 (patch) | |
| tree | 00866610e287ea041bac52bc4e1138fba17b44fd /target-arm/translate.c | |
| parent | d86d57d4fe683c99823f625f941eff26c07c72c3 (diff) | |
target-arm: UNDEF in the UNPREDICTABLE SRS-from-System case
Make get_r13_banked() raise an exception at runtime for the
corner case of SRS from System mode, so that we can UNDEF it;
this brings us in to line with the ARM ARM's set of permitted
CONSTRAINED UNPREDICTABLE choices.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Sergey Fedorov <serge.fdrv@gmail.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Diffstat (limited to 'target-arm/translate.c')
| -rw-r--r-- | target-arm/translate.c | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/target-arm/translate.c b/target-arm/translate.c index 7bceb05f48..e69145d401 100644 --- a/target-arm/translate.c +++ b/target-arm/translate.c @@ -7590,10 +7590,7 @@ static void gen_srs(DisasContext *s, * -- not a valid mode number * -- a mode that's at a higher exception level * -- Monitor, if we are Non-secure - * For the UNPREDICTABLE cases we choose to UNDEF, except that for - * "current mode is System" we will write a garbage SPSR. - * (This is because we don't have access to our current mode here - * and would have to do a runtime check to UNDEF for System.) + * For the UNPREDICTABLE cases we choose to UNDEF. */ if (s->current_el == 1 && !s->ns) { gen_exception_insn(s, 4, EXCP_UDEF, syn_uncategorized(), 3); @@ -7639,6 +7636,9 @@ static void gen_srs(DisasContext *s, addr = tcg_temp_new_i32(); tmp = tcg_const_i32(mode); + /* get_r13_banked() will raise an exception if called from System mode */ + gen_set_condexec(s); + gen_set_pc_im(s, s->pc - 4); gen_helper_get_r13_banked(addr, cpu_env, tmp); tcg_temp_free_i32(tmp); switch (amode) { @@ -7688,6 +7688,7 @@ static void gen_srs(DisasContext *s, tcg_temp_free_i32(tmp); } tcg_temp_free_i32(addr); + s->is_jmp = DISAS_UPDATE; } static void disas_arm_insn(DisasContext *s, unsigned int insn) |