diff options
| author | Peter Maydell <peter.maydell@linaro.org> | 2011-01-14 20:39:19 +0100 |
|---|---|---|
| committer | Aurelien Jarno <aurelien@aurel32.net> | 2011-01-14 20:39:19 +0100 |
| commit | 7204ab889f1cf5b09026af22185525edbee07a97 (patch) | |
| tree | c052c8ab2c1a514a8d2adbf05664e02aa06e48c7 /target-arm/translate.c | |
| parent | 69d1fc221a0bcd6a9a17e79ab933ab7525f15973 (diff) | |
target-arm: Translate with Thumb state from TB flags, not CPUState
The Thumb/ARM state for the TB being translated should come from
the TB flags, not the CPUState.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'target-arm/translate.c')
| -rw-r--r-- | target-arm/translate.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/target-arm/translate.c b/target-arm/translate.c index e15d10b251..45f8e3e8a3 100644 --- a/target-arm/translate.c +++ b/target-arm/translate.c @@ -9095,7 +9095,7 @@ static inline void gen_intermediate_code_internal(CPUState *env, dc->pc = pc_start; dc->singlestep_enabled = env->singlestep_enabled; dc->condjmp = 0; - dc->thumb = env->thumb; + dc->thumb = ARM_TBFLAG_THUMB(tb->flags); dc->condexec_mask = (env->condexec_bits & 0xf) << 1; dc->condexec_cond = env->condexec_bits >> 4; #if !defined(CONFIG_USER_ONLY) @@ -9182,7 +9182,7 @@ static inline void gen_intermediate_code_internal(CPUState *env, if (num_insns + 1 == max_insns && (tb->cflags & CF_LAST_IO)) gen_io_start(); - if (env->thumb) { + if (dc->thumb) { disas_thumb_insn(env, dc); if (dc->condexec_mask) { dc->condexec_cond = (dc->condexec_cond & 0xe) @@ -9296,7 +9296,7 @@ done_generating: if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) { qemu_log("----------------\n"); qemu_log("IN: %s\n", lookup_symbol(pc_start)); - log_target_disas(pc_start, dc->pc - pc_start, env->thumb); + log_target_disas(pc_start, dc->pc - pc_start, dc->thumb); qemu_log("\n"); } #endif |