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author | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-07-03 17:57:36 +0000 |
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committer | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-07-03 17:57:36 +0000 |
commit | 551bd27f22638c854c43d7e6417d549764311c31 (patch) | |
tree | b67965e4923a4b5367c47686b279be46ba79c2a0 /target-arm/translate.c | |
parent | 06e80fc92715ca720d23526f6d3db8c78fd8971c (diff) |
Convert remaining __builtin_expect to likely/unlikely, by Jan Kiszka.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4840 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-arm/translate.c')
-rw-r--r-- | target-arm/translate.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/target-arm/translate.c b/target-arm/translate.c index e03de44d56..a3aabd26db 100644 --- a/target-arm/translate.c +++ b/target-arm/translate.c @@ -3393,7 +3393,7 @@ static inline void gen_goto_tb(DisasContext *s, int n, uint32_t dest) static inline void gen_jmp (DisasContext *s, uint32_t dest) { - if (__builtin_expect(s->singlestep_enabled, 0)) { + if (unlikely(s->singlestep_enabled)) { /* An indirect jump so that we still trigger the debug exception. */ if (s->thumb) dest |= 1; @@ -8703,7 +8703,7 @@ static inline int gen_intermediate_code_internal(CPUState *env, /* At this stage dc->condjmp will only be set when the skipped instruction was a conditional branch or trap, and the PC has already been written. */ - if (__builtin_expect(env->singlestep_enabled, 0)) { + if (unlikely(env->singlestep_enabled)) { /* Make sure the pc is updated, and raise a debug exception. */ if (dc->condjmp) { gen_set_condexec(dc); |