diff options
| author | Peter Maydell <peter.maydell@linaro.org> | 2013-09-10 19:09:32 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2013-09-10 19:09:32 +0100 |
| commit | 534df156090539854c2ac819dcdb096d01dab5c1 (patch) | |
| tree | 73c5847f3ee8b82203d3f327f81112d2efd54eb2 /target-arm/translate.c | |
| parent | f5f6d38b7458b8a1a46a750ac131ca8a2d45d946 (diff) | |
target-arm: Use sextract32() in branch decode
In the decode of ARM B and BL insns, swap the order of the
"append 2 implicit zeros to imm24" and the sign extend, and
use the new sextract32() utility function to do the latter.
This avoids a direct dependency on the undefined C behaviour
of shifting into the sign bit of an integer.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Message-id: 1378391908-22137-2-git-send-email-peter.maydell@linaro.org
Diffstat (limited to 'target-arm/translate.c')
| -rw-r--r-- | target-arm/translate.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/target-arm/translate.c b/target-arm/translate.c index 4f4a0a97d2..8bcfaf3e1b 100644 --- a/target-arm/translate.c +++ b/target-arm/translate.c @@ -28,6 +28,7 @@ #include "disas/disas.h" #include "tcg-op.h" #include "qemu/log.h" +#include "qemu/bitops.h" #include "helper.h" #define GEN_HELPER 1 @@ -7957,8 +7958,8 @@ static void disas_arm_insn(CPUARMState * env, DisasContext *s) tcg_gen_movi_i32(tmp, val); store_reg(s, 14, tmp); } - offset = (((int32_t)insn << 8) >> 8); - val += (offset << 2) + 4; + offset = sextract32(insn << 2, 0, 26); + val += offset + 4; gen_jmp(s, val); } break; |