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| author | Rob Herring <rob.herring@linaro.org> | 2014-04-15 19:18:44 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2014-04-17 21:34:04 +0100 |
| commit | 52e60cdd342dc48116edb81b443ba8c0a0c6f1a3 (patch) | |
| tree | 03c2b84affc505cae383fdd0782a5d06539a1118 /target-arm/translate-a64.c | |
| parent | 2f2a00aec9838bc52ac4f5dd452f4cf533effa88 (diff) | |
target-arm: Implement AArch64 EL1 exception handling
Implement exception handling for AArch64 EL1. Exceptions from AArch64 or
AArch32 EL0 are supported.
Signed-off-by: Rob Herring <rob.herring@linaro.org>
[PMM: fixed minor style nits; updated to match changes in
previous patches; added some of the simpler cases of
illegal-exception-return support]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Diffstat (limited to 'target-arm/translate-a64.c')
| -rw-r--r-- | target-arm/translate-a64.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c index 4c5402a0f7..188287d031 100644 --- a/target-arm/translate-a64.c +++ b/target-arm/translate-a64.c @@ -1512,6 +1512,9 @@ static void disas_uncond_b_reg(DisasContext *s, uint32_t insn) tcg_gen_movi_i64(cpu_reg(s, 30), s->pc); break; case 4: /* ERET */ + gen_helper_exception_return(cpu_env); + s->is_jmp = DISAS_JUMP; + return; case 5: /* DRPS */ if (rn != 0x1f) { unallocated_encoding(s); |