diff options
author | Peter Maydell <peter.maydell@linaro.org> | 2016-10-12 18:54:34 +0100 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2016-10-17 19:32:44 +0100 |
commit | 194cbc492bcc8f3f1868ec97a35146bc99c3c71c (patch) | |
tree | c100c93161bbb56da23f3306e396671a5ca51c31 /target-arm/trace-events | |
parent | 5dbdc4342f479d799a1970dd5fd22e64c9dcd50d (diff) |
target-arm: Add trace events for the generic timers
Add some useful trace events for the ARM generic timers (notably
the various register writes and the resulting IRQ line state).
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Message-id: 1476294876-12340-3-git-send-email-peter.maydell@linaro.org
Diffstat (limited to 'target-arm/trace-events')
-rw-r--r-- | target-arm/trace-events | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/target-arm/trace-events b/target-arm/trace-events new file mode 100644 index 0000000000..9f726bdae3 --- /dev/null +++ b/target-arm/trace-events @@ -0,0 +1,10 @@ +# See docs/tracing.txt for syntax documentation. + +# target-arm/helper.c +arm_gt_recalc(int timer, int irqstate, uint64_t nexttick) "gt recalc: timer %d irqstate %d next tick %" PRIx64 +arm_gt_recalc_disabled(int timer) "gt recalc: timer %d irqstate 0 timer disabled" +arm_gt_cval_write(int timer, uint64_t value) "gt_cval_write: timer %d value %" PRIx64 +arm_gt_tval_write(int timer, uint64_t value) "gt_tval_write: timer %d value %" PRIx64 +arm_gt_ctl_write(int timer, uint64_t value) "gt_ctl_write: timer %d value %" PRIx64 +arm_gt_imask_toggle(int timer, int irqstate) "gt_ctl_write: timer %d IMASK toggle, new irqstate %d" +arm_gt_cntvoff_write(uint64_t value) "gt_cntvoff_write: value %" PRIx64 |