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authorPeter Maydell <peter.maydell@linaro.org>2016-02-23 15:36:43 +0000
committerPeter Maydell <peter.maydell@linaro.org>2016-02-26 15:09:41 +0000
commit50866ba5a2cfe922aaf3edb79f6eac5b0653477a (patch)
tree39acd126ce238393135ebce39ea3ef42560ce58e /target-arm/op_helper.c
parent235ea1f5c89abf30e452539b973b0dbe43d3fe2b (diff)
target-arm: Add write_type argument to cpsr_write()
Add an argument to cpsr_write() to indicate what kind of CPSR write is being requested, since the exact behaviour should differ for the different cases. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Sergey Fedorov <serge.fdrv@gmail.com> Message-id: 1455556977-3644-3-git-send-email-peter.maydell@linaro.org
Diffstat (limited to 'target-arm/op_helper.c')
-rw-r--r--target-arm/op_helper.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/target-arm/op_helper.c b/target-arm/op_helper.c
index e3ddd5ad34..543d33aad2 100644
--- a/target-arm/op_helper.c
+++ b/target-arm/op_helper.c
@@ -422,13 +422,13 @@ uint32_t HELPER(cpsr_read)(CPUARMState *env)
void HELPER(cpsr_write)(CPUARMState *env, uint32_t val, uint32_t mask)
{
- cpsr_write(env, val, mask);
+ cpsr_write(env, val, mask, CPSRWriteByInstr);
}
/* Write the CPSR for a 32-bit exception return */
void HELPER(cpsr_write_eret)(CPUARMState *env, uint32_t val)
{
- cpsr_write(env, val, CPSR_ERET_MASK);
+ cpsr_write(env, val, CPSR_ERET_MASK, CPSRWriteExceptionReturn);
}
/* Access to user mode registers from privileged modes. */
@@ -780,7 +780,7 @@ void HELPER(exception_return)(CPUARMState *env)
if (!return_to_aa64) {
env->aarch64 = 0;
env->uncached_cpsr = spsr & CPSR_M;
- cpsr_write(env, spsr, ~0);
+ cpsr_write(env, spsr, ~0, CPSRWriteRaw);
if (!arm_singlestep_active(env)) {
env->uncached_cpsr &= ~PSTATE_SS;
}