diff options
| author | Peter Maydell <peter.maydell@linaro.org> | 2016-02-18 14:16:17 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2016-02-18 14:16:17 +0000 |
| commit | f01377f591fe15c652f947646c4a69a7d4a71ad9 (patch) | |
| tree | 00866610e287ea041bac52bc4e1138fba17b44fd /target-arm/op_helper.c | |
| parent | d86d57d4fe683c99823f625f941eff26c07c72c3 (diff) | |
target-arm: UNDEF in the UNPREDICTABLE SRS-from-System case
Make get_r13_banked() raise an exception at runtime for the
corner case of SRS from System mode, so that we can UNDEF it;
this brings us in to line with the ARM ARM's set of permitted
CONSTRAINED UNPREDICTABLE choices.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Sergey Fedorov <serge.fdrv@gmail.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Diffstat (limited to 'target-arm/op_helper.c')
| -rw-r--r-- | target-arm/op_helper.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/target-arm/op_helper.c b/target-arm/op_helper.c index cfdbc8da94..538887ce0c 100644 --- a/target-arm/op_helper.c +++ b/target-arm/op_helper.c @@ -468,6 +468,14 @@ void HELPER(set_r13_banked)(CPUARMState *env, uint32_t mode, uint32_t val) uint32_t HELPER(get_r13_banked)(CPUARMState *env, uint32_t mode) { + if ((env->uncached_cpsr & CPSR_M) == ARM_CPU_MODE_SYS) { + /* SRS instruction is UNPREDICTABLE from System mode; we UNDEF. + * Other UNPREDICTABLE and UNDEF cases were caught at translate time. + */ + raise_exception(env, EXCP_UDEF, syn_uncategorized(), + exception_target_el(env)); + } + if ((env->uncached_cpsr & CPSR_M) == mode) { return env->regs[13]; } else { |