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| author | Peter Maydell <peter.maydell@linaro.org> | 2016-06-17 16:16:37 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2016-06-17 16:16:37 +0100 |
| commit | 482b61844ae7c6df39df0b48ac90ffbc87bed7d2 (patch) | |
| tree | f3344170f132d6c8f01e4693496a37827b654c15 /target-arm/op_helper.c | |
| parent | da838dfc40cb7e12e2ae7b33236e426e029fed15 (diff) | |
| parent | f06765a94a31bdd8b65fc83fd91a6c3f8e8a1195 (diff) | |
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20160617' into staging
target-arm queue:
* GICv3 emulation
# gpg: Signature made Fri 17 Jun 2016 15:24:28 BST
# gpg: using RSA key 0x3C2525ED14360CDE
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>"
# gpg: aka "Peter Maydell <pmaydell@gmail.com>"
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>"
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* remotes/pmaydell/tags/pull-target-arm-20160617: (22 commits)
ACPI: ARM: Present GIC version in MADT table
hw/timer: Add value matching support to aspeed_timer
target-arm/monitor.c: Advertise emulated GICv3 in capabilities
target-arm/machine.c: Allow user to request GICv3 emulation
hw/intc/arm_gicv3: Add IRQ handling CPU interface registers
hw/intc/arm_gicv3: Implement CPU i/f SGI generation registers
hw/intc/arm_gicv3: Implement gicv3_cpuif_update()
hw/intc/arm_gicv3: Implement GICv3 CPU interface registers
hw/intc/arm_gicv3: Implement gicv3_set_irq()
hw/intc/arm_gicv3: Wire up distributor and redistributor MMIO regions
hw/intc/arm_gicv3: Implement GICv3 redistributor registers
hw/intc/arm_gicv3: Implement GICv3 distributor registers
hw/intc/arm_gicv3: Implement functions to identify next pending irq
hw/intc/arm_gicv3: ARM GICv3 device framework
hw/intc/arm_gicv3: Add vmstate descriptors
hw/intc/arm_gicv3: Move irq lines into GICv3CPUState structure
hw/intc/arm_gicv3: Add state information
target-arm: Add mp-affinity property for ARM CPU class
target-arm: Provide hook to tell GICv3 about changes of security state
target-arm: Define new arm_is_el3_or_mon() function
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target-arm/op_helper.c')
| -rw-r--r-- | target-arm/op_helper.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/target-arm/op_helper.c b/target-arm/op_helper.c index 35912a1192..73da759206 100644 --- a/target-arm/op_helper.c +++ b/target-arm/op_helper.c @@ -474,6 +474,8 @@ void HELPER(cpsr_write)(CPUARMState *env, uint32_t val, uint32_t mask) void HELPER(cpsr_write_eret)(CPUARMState *env, uint32_t val) { cpsr_write(env, val, CPSR_ERET_MASK, CPSRWriteExceptionReturn); + + arm_call_el_change_hook(arm_env_get_cpu(env)); } /* Access to user mode registers from privileged modes. */ @@ -969,6 +971,8 @@ void HELPER(exception_return)(CPUARMState *env) env->pc = env->elr_el[cur_el]; } + arm_call_el_change_hook(arm_env_get_cpu(env)); + return; illegal_return: |