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authorJuha Riihimäki <juha.riihimaki@nokia.com>2010-12-07 14:13:42 +0000
committerAurelien Jarno <aurelien@aurel32.net>2010-12-27 21:07:03 +0100
commit4c9b70aeca70b3e0a68a771727f388551620b3ed (patch)
treefef81fdf1dec6fcbb69c4fff2aab49d15284ff55 /target-arm/neon_helper.c
parentdef126ce37b037afc55878197159d9ddcb24a9e4 (diff)
target-arm: Fix VQSHL of signed 64 bit values
Add a missing '-' which meant that we were misinterpreting the shift argument for VQSHL of 64 bit signed values and treating almost every shift value as if it were an extremely large right shift. Signed-off-by: Juha Riihimäki <juha.riihimaki@nokia.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'target-arm/neon_helper.c')
-rw-r--r--target-arm/neon_helper.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/target-arm/neon_helper.c b/target-arm/neon_helper.c
index 5e6452b9d9..d29b884614 100644
--- a/target-arm/neon_helper.c
+++ b/target-arm/neon_helper.c
@@ -610,7 +610,7 @@ uint64_t HELPER(neon_qshl_s64)(CPUState *env, uint64_t valop, uint64_t shiftop)
SET_QC();
val = (val >> 63) & ~SIGNBIT64;
}
- } else if (shift <= 64) {
+ } else if (shift <= -64) {
val >>= 63;
} else if (shift < 0) {
val >>= -shift;