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authorPeter Maydell <peter.maydell@linaro.org>2014-01-07 17:19:15 +0000
committerPeter Maydell <peter.maydell@linaro.org>2014-01-08 19:07:23 +0000
commit8900aad218f8f2348bcd688eacf06d6c1f66bc69 (patch)
treedc7b24cfa11d1c99a8099fd3fb1e401515afa59e /target-arm/helper.c
parentd9b0848d944aab124f03cedc8f54c3940450f3b0 (diff)
target-arm: A64: Add support for FCVT between half, single and double
Add support for FCVT between half, single and double precision. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'target-arm/helper.c')
-rw-r--r--target-arm/helper.c20
1 files changed, 20 insertions, 0 deletions
diff --git a/target-arm/helper.c b/target-arm/helper.c
index c6a62818e4..c708f15e27 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -4089,6 +4089,26 @@ uint32_t HELPER(vfp_fcvt_f32_to_f16)(float32 a, CPUARMState *env)
return do_fcvt_f32_to_f16(a, env, &env->vfp.fp_status);
}
+float64 HELPER(vfp_fcvt_f16_to_f64)(uint32_t a, CPUARMState *env)
+{
+ int ieee = (env->vfp.xregs[ARM_VFP_FPSCR] & (1 << 26)) == 0;
+ float64 r = float16_to_float64(make_float16(a), ieee, &env->vfp.fp_status);
+ if (ieee) {
+ return float64_maybe_silence_nan(r);
+ }
+ return r;
+}
+
+uint32_t HELPER(vfp_fcvt_f64_to_f16)(float64 a, CPUARMState *env)
+{
+ int ieee = (env->vfp.xregs[ARM_VFP_FPSCR] & (1 << 26)) == 0;
+ float16 r = float64_to_float16(a, ieee, &env->vfp.fp_status);
+ if (ieee) {
+ r = float16_maybe_silence_nan(r);
+ }
+ return float16_val(r);
+}
+
#define float32_two make_float32(0x40000000)
#define float32_three make_float32(0x40400000)
#define float32_one_point_five make_float32(0x3fc00000)