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authorAndreas Färber <afaerber@suse.de>2012-12-17 06:18:02 +0100
committerAndreas Färber <afaerber@suse.de>2013-01-15 04:09:13 +0100
commit55e5c2850293547203874098f7cec148ffd12dfa (patch)
treef9a9cc316999b7b52726b5186a925022b3747daa /target-arm/helper.c
parent1b1ed8dc40635d60dd95c04658989af63542fcbf (diff)
cpu: Move cpu_index field to CPUState
Note that target-alpha accesses this field from TCG, now using a negative offset. Therefore the field is placed last in CPUState. Pass PowerPCCPU to [kvm]ppc_fixup_cpu() to facilitate this change. Move common parts of mips cpu_state_reset() to mips_cpu_reset(). Acked-by: Richard Henderson <rth@twiddle.net> (for alpha) [AF: Rebased onto ppc CPU subclasses and openpic changes] Signed-off-by: Andreas Färber <afaerber@suse.de>
Diffstat (limited to 'target-arm/helper.c')
-rw-r--r--target-arm/helper.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 66ab78e3f1..37c34a11c4 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -902,7 +902,8 @@ static const ARMCPRegInfo strongarm_cp_reginfo[] = {
static int mpidr_read(CPUARMState *env, const ARMCPRegInfo *ri,
uint64_t *value)
{
- uint32_t mpidr = env->cpu_index;
+ CPUState *cs = CPU(arm_env_get_cpu(env));
+ uint32_t mpidr = cs->cpu_index;
/* We don't support setting cluster ID ([8..11])
* so these bits always RAZ.
*/