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authorPeter Maydell <peter.maydell@linaro.org>2015-08-13 11:26:21 +0100
committerPeter Maydell <peter.maydell@linaro.org>2015-08-13 11:26:21 +0100
commit49a661910c1374858602a3002b67115893673c25 (patch)
treec837551eff756d10100f4bf869527ab7197b52f2 /target-arm/helper.c
parente6fbcbc4e57322a8de1307556e68a4cd6d0d8c8b (diff)
target-arm: Add debug check for mismatched cpreg resets
It's easy to accidentally define two cpregs which both try to reset the same underlying state field (for instance a clash between an AArch64 EL3 definition and an AArch32 banked register definition). if the two definitions disagree about the reset value then the result is dependent on which one happened to be reached last in the hashtable enumeration. Add a consistency check to detect and assert in these cases: after reset, we run a second pass where we check that the reset operation doesn't change the value of the register. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 1436797559-20835-1-git-send-email-peter.maydell@linaro.org
Diffstat (limited to 'target-arm/helper.c')
-rw-r--r--target-arm/helper.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 4a7dd24bb2..49ce612ab1 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -144,7 +144,7 @@ static void *raw_ptr(CPUARMState *env, const ARMCPRegInfo *ri)
return (char *)env + ri->fieldoffset;
}
-static uint64_t read_raw_cp_reg(CPUARMState *env, const ARMCPRegInfo *ri)
+uint64_t read_raw_cp_reg(CPUARMState *env, const ARMCPRegInfo *ri)
{
/* Raw read of a coprocessor register (as needed for migration, etc). */
if (ri->type & ARM_CP_CONST) {