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authorbalrog <balrog@c046a42c-6fe2-441c-8c8c-71466251a162>2007-04-30 02:02:17 +0000
committerbalrog <balrog@c046a42c-6fe2-441c-8c8c-71466251a162>2007-04-30 02:02:17 +0000
commit18c9b56060e6d69e38d0d91ffb02d510d8ce1971 (patch)
tree9d47bc9c28811fa847a85f845fa62c8e418a435b /target-arm/helper.c
parenta171fe394a82e3a2dad76e901959d859b1966541 (diff)
Implement iwMMXt instruction set for the PXA270 cpu.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2752 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'target-arm/helper.c')
-rw-r--r--target-arm/helper.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 798df304e1..8526883fb6 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -42,6 +42,8 @@ static void cpu_reset_model_id(CPUARMState *env, uint32_t id)
case ARM_CPUID_PXA270_C5:
set_feature(env, ARM_FEATURE_XSCALE);
/* JTAG_ID is ((id << 28) | 0x09265013) */
+ set_feature(env, ARM_FEATURE_IWMMXT);
+ env->iwmmxt.cregs[ARM_IWMMXT_wCID] = 0x69051000 | 'Q';
env->cp15.c0_cachetype = 0xd172172;
break;
default: