diff options
| author | Peter Maydell <peter.maydell@linaro.org> | 2014-08-04 15:01:38 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2014-08-04 15:01:38 +0100 |
| commit | 69f87f713069f1f70f86cb65883f7d43e3aa21de (patch) | |
| tree | 816428de782bde87199584b149b74a5203d1d245 /target-arm/helper-a64.c | |
| parent | cc11a0623ab4b16faa6945f1f6dedcb59f993b61 (diff) | |
| parent | dbb1fb277ca12acd577403575aa6a2f119ab79ea (diff) | |
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20140804' into staging
target-arm queue:
* Set PC correctly when loading AArch64 ELF files
* sdhci: Fix ADMA dma_memory_read access
* some more foundational work for EL2/EL3 support
* fix bugs which reveal themselves if the TARGET_PAGE_SIZE
is not set to 1K
# gpg: Signature made Mon 04 Aug 2014 14:51:34 BST using RSA key ID 14360CDE
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>"
* remotes/pmaydell/tags/pull-target-arm-20140804:
target-arm: A64: fix TLB flush instructions
target-arm: don't hardcode mask values in arm_cpu_handle_mmu_fault
target-arm: Fix bit test in sp_el0_access
target-arm: Add FAR_EL2 and 3
target-arm: Add ESR_EL2 and 3
target-arm: Make far_el1 an array
target-arm: A64: Respect SPSEL when taking exceptions
target-arm: A64: Respect SPSEL in ERET SP restore
target-arm: A64: Break out aarch64_save/restore_sp
sd: sdhci: Fix ADMA dma_memory_read access
hw/arm/virt: formatting: memory map
hw/arm/boot: Set PC correctly when loading AArch64 ELF files
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target-arm/helper-a64.c')
| -rw-r--r-- | target-arm/helper-a64.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/target-arm/helper-a64.c b/target-arm/helper-a64.c index 2b4ce6ac60..2e9ef64786 100644 --- a/target-arm/helper-a64.c +++ b/target-arm/helper-a64.c @@ -465,13 +465,13 @@ void aarch64_cpu_do_interrupt(CPUState *cs) } env->cp15.esr_el[1] = env->exception.syndrome; - env->cp15.far_el1 = env->exception.vaddress; + env->cp15.far_el[1] = env->exception.vaddress; switch (cs->exception_index) { case EXCP_PREFETCH_ABORT: case EXCP_DATA_ABORT: qemu_log_mask(CPU_LOG_INT, "...with FAR 0x%" PRIx64 "\n", - env->cp15.far_el1); + env->cp15.far_el[1]); break; case EXCP_BKPT: case EXCP_UDEF: @@ -489,8 +489,7 @@ void aarch64_cpu_do_interrupt(CPUState *cs) if (is_a64(env)) { env->banked_spsr[aarch64_banked_spsr_index(1)] = pstate_read(env); - env->sp_el[arm_current_pl(env)] = env->xregs[31]; - env->xregs[31] = env->sp_el[1]; + aarch64_save_sp(env, arm_current_pl(env)); env->elr_el[1] = env->pc; } else { env->banked_spsr[0] = cpsr_read(env); @@ -508,6 +507,7 @@ void aarch64_cpu_do_interrupt(CPUState *cs) pstate_write(env, PSTATE_DAIF | PSTATE_MODE_EL1h); env->aarch64 = 1; + aarch64_restore_sp(env, 1); env->pc = addr; cs->interrupt_request |= CPU_INTERRUPT_EXITTB; |