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authorPeter Maydell <peter.maydell@linaro.org>2015-09-07 10:39:28 +0100
committerPeter Maydell <peter.maydell@linaro.org>2015-09-07 10:39:28 +0100
commit8012c84ff92a36d05dfe61af9b24dd01a7ea25e4 (patch)
tree9aac5bee6b1e79b5c943c8c26a5c90eb3d0c9f42 /target-arm/helper-a64.c
parent7446d35e1dd69e1da8241277eae09e293741b362 (diff)
target-arm: Wire up HLT 0xf000 as the A64 semihosting instruction
For the A64 instruction set, the semihosting call instruction is 'HLT 0xf000'. Wire this up to call do_arm_semihosting() if semihosting is enabled. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Christopher Covington <christopher.covington@linaro.org> Tested-by: Christopher Covington <cov@codeaurora.org> Message-id: 1439483745-28752-10-git-send-email-peter.maydell@linaro.org
Diffstat (limited to 'target-arm/helper-a64.c')
-rw-r--r--target-arm/helper-a64.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/target-arm/helper-a64.c b/target-arm/helper-a64.c
index 08c95a3f52..02fc9b4a29 100644
--- a/target-arm/helper-a64.c
+++ b/target-arm/helper-a64.c
@@ -514,6 +514,12 @@ void aarch64_cpu_do_interrupt(CPUState *cs)
case EXCP_VFIQ:
addr += 0x100;
break;
+ case EXCP_SEMIHOST:
+ qemu_log_mask(CPU_LOG_INT,
+ "...handling as semihosting call 0x%" PRIx64 "\n",
+ env->xregs[0]);
+ env->xregs[0] = do_arm_semihosting(env);
+ return;
default:
cpu_abort(cs, "Unhandled exception 0x%x\n", cs->exception_index);
}