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authorGreg Bellows <greg.bellows@linaro.org>2015-05-29 11:28:51 +0100
committerPeter Maydell <peter.maydell@linaro.org>2015-05-29 11:28:51 +0100
commit012a906b19e99b126403ff4a257617dab9b34163 (patch)
tree5f1e0e8c46dcf6ee493ecb2d08d6b4e738a469cd /target-arm/helper-a64.c
parentc63285991b371c031147ad620dd7671662a90303 (diff)
target-arm: Update interrupt handling to use target EL
Updated the interrupt handling to utilize and report through the target EL exception field. This includes consolidating and cleaning up code where needed. Target EL is now calculated once in arm_cpu_exec_interrupt() and do_interrupt was updated to use the target_el exception field. The necessary code from arm_excp_target_el() was merged in where needed and the function removed. Signed-off-by: Greg Bellows <greg.bellows@linaro.org> Acked-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 1429722561-12651-4-git-send-email-greg.bellows@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target-arm/helper-a64.c')
-rw-r--r--target-arm/helper-a64.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/target-arm/helper-a64.c b/target-arm/helper-a64.c
index 861f6fa69c..e30af0659e 100644
--- a/target-arm/helper-a64.c
+++ b/target-arm/helper-a64.c
@@ -463,7 +463,7 @@ void aarch64_cpu_do_interrupt(CPUState *cs)
{
ARMCPU *cpu = ARM_CPU(cs);
CPUARMState *env = &cpu->env;
- unsigned int new_el = arm_excp_target_el(cs, cs->exception_index);
+ unsigned int new_el = env->exception.target_el;
target_ulong addr = env->cp15.vbar_el[new_el];
unsigned int new_mode = aarch64_pstate_mode(new_el, true);