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authorSergey Fedorov <serge.fdrv@gmail.com>2015-06-15 18:06:08 +0100
committerPeter Maydell <peter.maydell@linaro.org>2015-06-15 18:06:08 +0100
commit13b72b2b9aa7ab7ee129e38e9587acd6a1b9a932 (patch)
treee73eef2e6b0e214024a2e0016f080f154cde0b2a /target-arm/cpu64.c
parent8772de2c53b44c75f18140646aa928e6d77cb9d8 (diff)
target-arm: Fix REVIDR reset value
According to ARM Cortex-A53/A57 TRM, REVIDR reset value should be zero. So let REVIDR reset value be specified by CPU model and correct it for Cortex-A53/A57. Signed-off-by: Sergey Fedorov <serge.fdrv@gmail.com> Message-id: 1433321048-23793-2-git-send-email-serge.fdrv@gmail.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target-arm/cpu64.c')
-rw-r--r--target-arm/cpu64.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/target-arm/cpu64.c b/target-arm/cpu64.c
index dd6f9d86f9..63c8b1cfa9 100644
--- a/target-arm/cpu64.c
+++ b/target-arm/cpu64.c
@@ -110,6 +110,7 @@ static void aarch64_a57_initfn(Object *obj)
set_feature(&cpu->env, ARM_FEATURE_CRC);
cpu->kvm_target = QEMU_KVM_ARM_TARGET_CORTEX_A57;
cpu->midr = 0x411fd070;
+ cpu->revidr = 0x00000000;
cpu->reset_fpsid = 0x41034070;
cpu->mvfr0 = 0x10110222;
cpu->mvfr1 = 0x12111111;
@@ -161,6 +162,7 @@ static void aarch64_a53_initfn(Object *obj)
set_feature(&cpu->env, ARM_FEATURE_CRC);
cpu->kvm_target = QEMU_KVM_ARM_TARGET_CORTEX_A53;
cpu->midr = 0x410fd034;
+ cpu->revidr = 0x00000000;
cpu->reset_fpsid = 0x41034070;
cpu->mvfr0 = 0x10110222;
cpu->mvfr1 = 0x12111111;