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authorVeres Lajos <vlajos@gmail.com>2015-09-08 22:45:14 +0100
committerMichael Tokarev <mjt@tls.msk.ru>2015-09-11 10:45:43 +0300
commit67cc32ebfd8c0ee3fcdb26780a8991baf5eb1d45 (patch)
tree86bc6be6682ce785667cef755e1b630e317ad696 /target-arm/cpu.h
parent33b23b4b5e15923acaf315b01a535c15b239483b (diff)
typofixes - v4
Signed-off-by: Veres Lajos <vlajos@gmail.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
Diffstat (limited to 'target-arm/cpu.h')
-rw-r--r--target-arm/cpu.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index 36407de6b3..5abd8ba5c5 100644
--- a/target-arm/cpu.h
+++ b/target-arm/cpu.h
@@ -224,8 +224,8 @@ typedef struct CPUARMState {
};
/* MMU translation table base control. */
TCR tcr_el[4];
- uint32_t c2_data; /* MPU data cachable bits. */
- uint32_t c2_insn; /* MPU instruction cachable bits. */
+ uint32_t c2_data; /* MPU data cacheable bits. */
+ uint32_t c2_insn; /* MPU instruction cacheable bits. */
union { /* MMU domain access control register
* MPU write buffer control.
*/