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| author | Peter Maydell <peter.maydell@linaro.org> | 2012-01-25 12:42:29 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2012-01-25 15:10:17 +0000 |
| commit | 0b03bdfca179f87c2256c61ee908011890f9d4df (patch) | |
| tree | 48a74350789dceaf5c834161d36655c082d2e191 /target-arm/cpu.h | |
| parent | 0383ac006f6bfa60d5cb3d0ddf4a9e1d65f9c900 (diff) | |
Add Cortex-A15 CPU definition
Add a definition of a Cortex-A15 CPU. Note that for the moment we do
not implement any of:
* Large Physical Address Extensions (LPAE)
* Virtualization Extensions
* Generic Timer
* TrustZone (this is also true of our existing Cortex-A9 model, etc)
This CPU model is sufficient to boot a Linux kernel which has been
compiled for an A15 without LPAE enabled.
Reviewed-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'target-arm/cpu.h')
| -rw-r--r-- | target-arm/cpu.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/target-arm/cpu.h b/target-arm/cpu.h index 7442c991ec..0d9b39ce21 100644 --- a/target-arm/cpu.h +++ b/target-arm/cpu.h @@ -433,6 +433,7 @@ void cpu_arm_set_cp_io(CPUARMState *env, int cpnum, #define ARM_CPUID_ARM11MPCORE 0x410fb022 #define ARM_CPUID_CORTEXA8 0x410fc080 #define ARM_CPUID_CORTEXA9 0x410fc090 +#define ARM_CPUID_CORTEXA15 0x412fc0f1 #define ARM_CPUID_CORTEXM3 0x410fc231 #define ARM_CPUID_ANY 0xffffffff |