diff options
| author | Peter Maydell <peter.maydell@linaro.org> | 2014-04-15 19:18:37 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2014-04-17 21:34:03 +0100 |
| commit | c2b820fe587b18448967cdd6d408abd1dc0471f2 (patch) | |
| tree | c20830b5786b1289ce979c8d5935aeb23ee360c4 /target-arm/cpu.h | |
| parent | ccd380876b79c3b46f85720c1be8e2cd40509460 (diff) | |
target-arm: Implement AArch64 DAIF system register
Implement the DAIF system register which is a view of the
DAIF bits in PSTATE. To avoid needing a readfn, we widen
the daif field in CPUARMState to uint64_t.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Diffstat (limited to 'target-arm/cpu.h')
| -rw-r--r-- | target-arm/cpu.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target-arm/cpu.h b/target-arm/cpu.h index 78d4fc5f2b..695a1e21f5 100644 --- a/target-arm/cpu.h +++ b/target-arm/cpu.h @@ -160,7 +160,7 @@ typedef struct CPUARMState { uint32_t GE; /* cpsr[19:16] */ uint32_t thumb; /* cpsr[5]. 0 = arm mode, 1 = thumb mode. */ uint32_t condexec_bits; /* IT bits. cpsr[15:10,26:25]. */ - uint32_t daif; /* exception masks, in the bits they are in in PSTATE */ + uint64_t daif; /* exception masks, in the bits they are in in PSTATE */ /* System control coprocessor (cp15) */ struct { |